[U-Boot] [PATCH 2/2] powerpc/mpc85xx: T104x: Add nand secure boot target

Sumit Garg sumit.garg at nxp.com
Wed May 18 10:34:33 CEST 2016


> On 04/01/2016 12:09 AM, Sumit Garg wrote:
> > For mpc85xx SoCs, the core begins execution from address 0xFFFFFFFC.
> > In non-secure boot scenario from NAND, this address will map to CPC
> > configured as SRAM. But in case of secure boot, this default address
> > always maps to IBR (Internal Boot ROM).
> > The IBR code requires that the bootloader(U-boot) must lie in 0 to
> > 3.5G address space i.e. 0x0 - 0xDFFFFFFF.
> >
> > For secure boot target from NAND, the text base for SPL is kept same
> > as non-secure boot target i.e. 0xFFFx_xxxx but the SPL U-boot binary
> > will be copied to CPC configured as SRAM with address in
> > 0-3.5G(0xBFFC_0000) As a the virtual and physical address of CPC would
> > be different. The virtual address 0xFFFx_xxxx needs to be mapped to
> > physical address 0xBFFx_xxxx.
> >
> > Create a new PBI file to configure CPC as SRAM with address 0xBFFC0000
> > and update DCFG SCRTACH1 register with location of Header required for
> > secure boot.
> >
> > The changes are similar to
> > commit 467a40dfe35f48d830f01a72617207d03ca85b4d
> >     powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P3041
> >
> > While P3041 has a 1MB CPC and does not require SPL. On T104x, CPC is
> > only 256K and thus SPL framework is used.
> > The changes are only applicable for SPL U-Boot running out of CPC SRAM
> > and not the next level U-Boot loaded on DDR.
> >
> > Reviewed-by: Ruchika Gupta <ruchika.gupta at nxp.com>
> > Signed-off-by: Aneesh Bansal <aneesh.bansal at nxp.com>
> > Signed-off-by: Sumit Garg <sumit.garg at nxp.com>
> > ---
> >  arch/powerpc/cpu/mpc85xx/cpu_init.c            |  4 +--
> >  arch/powerpc/cpu/mpc85xx/start.S               | 11 ++++++--
> >  arch/powerpc/include/asm/fsl_secure_boot.h     | 10 ++++++-
> >  board/freescale/t104xrdb/t104x_pbi_sb.cfg      | 38
> ++++++++++++++++++++++++++
> >  board/freescale/t104xrdb/tlb.c                 | 15 +++++++++-
> >  configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig | 11 ++++++++
> >  include/configs/T104xRDB.h                     | 29 +++++++++++++++++++-
> >  7 files changed, 110 insertions(+), 8 deletions(-)  create mode
> > 100644 board/freescale/t104xrdb/t104x_pbi_sb.cfg
> >  create mode 100644 configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
> >
> 
> Sumit,
> 
> Please rebase your patch to latest master branch. I am seeing compiling errors
> due to upstream changes.
> 
> Thanks.
> 
> York

I will be rebasing and send new set of patches in a couple of days.

Sumit



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