[U-Boot] [PATCH v2] armv8/ls2080ardb: Update DDR timing to support more UDIMMs

[York Sun]

On 04/06/2016 11:50 PM, Shengzhou Liu wrote:
> Optimize DDR timing for good margins to support new Transcend
> and Apacer DDR4 UDIMM besides current Micron UDIMM.
> 
> Verified 1333MT/s, 1600MT/s, 1866MT/s, 2133MT/s rate with
> following UDIMM on LS2080ARDB.
>  - Micron UDIMM: MTA18ASF1G72AZ-2G1A1Z
>  - Apacer UDIMM: 78.C1GM4.AF10B
>  - Transcend UDIMM: TS1GLH72V1H
> 
> Signed-off-by: Shengzhou Liu <Shengzhou.Liu at nxp.com>
> ---
> v2: verified lower rate, for 1333MT/s no changes are necessary. 
> 
>  board/freescale/ls2080ardb/ddr.h | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)

Applied to u-boot-fsl-qoriq master, awaiting upstream.

Thanks.

York