[U-Boot] [PATCH 23/27] boston: Provide physical CONFIG_SYS_SDRAM_BASE

[Paul Burton]

README states that CONFIG_SYS_SDRAM_BASE should the physical base
address of SDRAM, whilst up until now various pieces of generic code
have presumed that it can be directly accessed by the CPU & MIPS has
provided a virtual address for CONFIG_SYS_SDRAM_BASE. Other generic code
expects CONFIG_SYS_SDRAM_BASE to be a physical address, which makes the
inconsistency a mess.

Now that the preceding patches have prepared us to handle using a
physical CONFIG_SYS_SDRAM_BASE, clean up the inconsistency for boston by
providing a physical CONFIG_SYS_SDRAM_BASE. A side effect of this & use
of phys_to_virt is that on MIPS64 U-Boot will now access DDR through the
xkphys region of the virtual address space rather than ckseg0, which
necessitates the change to board_get_usable_ram_top().

Signed-off-by: Paul Burton <paul.burton at imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck at gmail.com>
---

 board/imgtec/boston/ddr.c |  8 ++------
 include/configs/boston.h  | 21 ++++++++++-----------
 2 files changed, 12 insertions(+), 17 deletions(-)

diff --git a/board/imgtec/boston/ddr.c b/board/imgtec/boston/ddr.c
index ceffef6..e765627 100644
--- a/board/imgtec/boston/ddr.c
+++ b/board/imgtec/boston/ddr.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <linux/sizes.h>
 
 #include <asm/io.h>
 
@@ -21,10 +22,5 @@ ulong board_get_usable_ram_top(ulong total_size)
 {
 	DECLARE_GLOBAL_DATA_PTR;
 
-	if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) {
-		/* 2GB wrapped around to 0 */
-		return CKSEG0ADDR(256 << 20);
-	}
-
-	return min_t(unsigned long, gd->ram_top, CKSEG0ADDR(256 << 20));
+	return min_t(ulong, gd->ram_top, (ulong)phys_to_virt(SZ_256M));
 }
diff --git a/include/configs/boston.h b/include/configs/boston.h
index e958054..37060b0 100644
--- a/include/configs/boston.h
+++ b/include/configs/boston.h
@@ -27,20 +27,19 @@
 /*
  * Memory map
  */
-#ifdef CONFIG_64BIT
-# define CONFIG_SYS_SDRAM_BASE		0xffffffff80000000
-#else
-# define CONFIG_SYS_SDRAM_BASE		0x80000000
-#endif
-
+#define CONFIG_SYS_SDRAM_BASE		0x0
 #define CONFIG_SYS_INIT_SP_OFFSET	0x400000
-
 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
 
-#define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x100000)
-
-#define CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE + 0)
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x10000000)
+#ifdef CONFIG_64BIT
+# define CONFIG_SYS_LOAD_ADDR		0xffffffff80100000
+# define CONFIG_SYS_MEMTEST_START	0xffffffff80000000
+# define CONFIG_SYS_MEMTEST_END		0xffffffff90000000
+#else
+# define CONFIG_SYS_LOAD_ADDR		0x80100000
+# define CONFIG_SYS_MEMTEST_START	0x80000000
+# define CONFIG_SYS_MEMTEST_END		0x90000000
+#endif
 
 #define CONFIG_SYS_MALLOC_LEN		(256 * 1024)
 
-- 
2.10.0