[U-Boot] [PATCH 32/82] x86: ivybridge: Tidy up enable_clock_gating() for 64-bit

[Bin Meng]

On Tue, Oct 11, 2016 at 11:16 AM, Bin Meng <bmeng.cn at gmail.com> wrote:
> Hi Simon,
>
> On Mon, Sep 26, 2016 at 11:33 AM, Simon Glass <sjg at chromium.org> wrote:
>> Fix the hex case and remove unused brackets. Use -0U instead of ~0UL to
>
> Should be: ~0U

Fixed this, and

>
>> allow compilation on 64-bit machines.
>>
>> Signed-off-by: Simon Glass <sjg at chromium.org>
>> ---
>>
>>  arch/x86/cpu/ivybridge/lpc.c | 8 ++++----
>>  1 file changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/x86/cpu/ivybridge/lpc.c b/arch/x86/cpu/ivybridge/lpc.c
>> index c564713..aef1206 100644
>> --- a/arch/x86/cpu/ivybridge/lpc.c
>> +++ b/arch/x86/cpu/ivybridge/lpc.c
>> @@ -357,10 +357,10 @@ static void enable_clock_gating(struct udevice *pch)
>>         reg16 |= (1 << 2) | (1 << 11);
>>         dm_pci_write_config16(pch, GEN_PMCON_1, reg16);
>>
>> -       pch_iobp_update(pch, 0xEB007F07, ~0UL, (1 << 31));
>> -       pch_iobp_update(pch, 0xEB004000, ~0UL, (1 << 7));
>> -       pch_iobp_update(pch, 0xEC007F07, ~0UL, (1 << 31));
>> -       pch_iobp_update(pch, 0xEC004000, ~0UL, (1 << 7));
>> +       pch_iobp_update(pch, 0xeb007f07, ~0U, 1 << 31);
>> +       pch_iobp_update(pch, 0xeb004000, ~0U, 1 << 7);
>> +       pch_iobp_update(pch, 0xec007f07, ~0U, 1 << 31);
>> +       pch_iobp_update(pch, 0xec004000, ~0U, 1 << 7);
>>
>>         reg32 = readl(RCB_REG(CG));
>>         reg32 |= (1 << 31);
>> --
>
> Reviewed-by: Bin Meng <bmeng.cn at gmail.com>

applied to u-boot-x86, thanks!