[U-Boot] [PATCH v1 1/1] ARM:SUNXI: Update DRAM clock for Olimex A20 boards
Hans de Goede
hdegoede at redhat.com
Tue Oct 11 11:38:35 CEST 2016
Hi,
On 10/11/2016 10:44 AM, Stefan Mavrodiev wrote:
> Originally dram clock was set to 480MHz, but this behaves
> unstable. To improve stability the clock is reduced to 384MHz
>
> Signed-off-by: Stefan Mavrodiev <stefan.mavrodiev at gmail.com>
The exact same change is already in u-boot-sunxi/next, and I've already
send out a pullreq to get this merged.
Regards,
Hans
> ---
> configs/A20-OLinuXino-Lime2_defconfig | 2 +-
> configs/A20-OLinuXino-Lime_defconfig | 2 +-
> configs/A20-Olimex-SOM-EVB_defconfig | 2 +-
> 3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig
> index 5688622..4751fe0 100644
> --- a/configs/A20-OLinuXino-Lime2_defconfig
> +++ b/configs/A20-OLinuXino-Lime2_defconfig
> @@ -2,7 +2,7 @@ CONFIG_ARM=y
> CONFIG_ARCH_SUNXI=y
> CONFIG_SPL_I2C_SUPPORT=y
> CONFIG_MACH_SUN7I=y
> -CONFIG_DRAM_CLK=480
> +CONFIG_DRAM_CLK=384
> CONFIG_MMC0_CD_PIN="PH1"
> CONFIG_USB0_VBUS_PIN="PC17"
> CONFIG_USB0_VBUS_DET="PH5"
> diff --git a/configs/A20-OLinuXino-Lime_defconfig b/configs/A20-OLinuXino-Lime_defconfig
> index c4f6e1a..024dc2d 100644
> --- a/configs/A20-OLinuXino-Lime_defconfig
> +++ b/configs/A20-OLinuXino-Lime_defconfig
> @@ -2,7 +2,7 @@ CONFIG_ARM=y
> CONFIG_ARCH_SUNXI=y
> CONFIG_SPL_I2C_SUPPORT=y
> CONFIG_MACH_SUN7I=y
> -CONFIG_DRAM_CLK=480
> +CONFIG_DRAM_CLK=384
> CONFIG_MMC0_CD_PIN="PH1"
> CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime"
> # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
> diff --git a/configs/A20-Olimex-SOM-EVB_defconfig b/configs/A20-Olimex-SOM-EVB_defconfig
> index 7a14a7b..3f4e90d 100644
> --- a/configs/A20-Olimex-SOM-EVB_defconfig
> +++ b/configs/A20-Olimex-SOM-EVB_defconfig
> @@ -2,7 +2,7 @@ CONFIG_ARM=y
> CONFIG_ARCH_SUNXI=y
> CONFIG_SPL_I2C_SUPPORT=y
> CONFIG_MACH_SUN7I=y
> -CONFIG_DRAM_CLK=480
> +CONFIG_DRAM_CLK=384
> CONFIG_MMC0_CD_PIN="PH1"
> CONFIG_MMC3_CD_PIN="PH0"
> CONFIG_MMC3_PINS="PH"
>
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