[U-Boot] [PATCH V2 2/2] net: add driver for Synopsys Ethernet QoS device

[Joe Hershberger]

On Tue, Oct 4, 2016 at 12:45 AM, Stephen Warren <swarren at wwwdotorg.org> wrote:
> From: Stephen Warren <swarren at nvidia.com>
>
> This driver supports the Synopsys Designware Ethernet QoS (Quality of
> Service) a/k/a eqos IP block, which is a different design than the HW
> supported by the existing designware.c driver. The IP supports many
> options for bus type, clocking/reset structure, and feature list. This
> driver currently supports the specific configuration used in NVIDIA's
> Tegra186 chip, but should be extensible to other combinations quite
> easily, as explained in the source.
>
> Signed-off-by: Stephen Warren <swarren at nvidia.com>
> Reviewed-by: Simon Glass <sjg at chromium.org> # V1
> ---
> v2:
> * Add note about x86 IO coherency.
> * Use wait_bit() where possible.
> * Use a struct definition of the RX and TX descriptors.
> ---
>  drivers/net/Kconfig       |   11 +
>  drivers/net/Makefile      |    1 +
>  drivers/net/dwc_eth_qos.c | 1497 +++++++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 1509 insertions(+)
>  create mode 100644 drivers/net/dwc_eth_qos.c
>

snip...

> diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
> new file mode 100644
> index 000000000000..f41aba97a494
> --- /dev/null
> +++ b/drivers/net/dwc_eth_qos.c

snip...

> +/*
> + * Warn if the cache-line size is larger than the descriptor size. In such
> + * cases the driver will likely fail because the CPU needs to flush the cache
> + * when requeuing RX buffers, therefore descriptors written by the hardware
> + * may be discarded. Architectures with full IO coherence, such as x86, do not
> + * experience this issue, and hence are excluded from this condition.

Great, thanks.

> + *
> + * This can be fixed by defining CONFIG_SYS_NONCACHED_MEMORY which will cause
> + * the driver to allocate descriptors from a pool of non-cached memory.
> + */
> +#if EQOS_DESCRIPTOR_SIZE < ARCH_DMA_MINALIGN
> +#if !defined(CONFIG_SYS_NONCACHED_MEMORY) && \
> +       !defined(CONFIG_SYS_DCACHE_OFF) && !defined(CONFIG_X86)
> +#warning Cache line size is larger than descriptor size
> +#endif
> +#endif
> +
> +/*
> + * This represents the "Transmit Normal Descriptor (Read Format). The format
> + * written by HW is different, except for the OWN bit in the flags field. Field

"The format written by HW is different, except for the OWN bit in the
flags field."

This sentence is confusing. Different how? If it's written by HW,
isn't it read by driver? Hence it's this format? What is this "Read
Format" naming convention?

> + * naming assumes SW places uses single buffer per descriptor, rather than
> + * separate header/payload buffers, such that a single 64-bit pointer is used.

This sentence is also odd. Is this copied from a data sheet that was
processed through Google translate?

> + */
> +struct eqos_tx_desc {
> +       u32 buf_lo;
> +       u32 buf_hi;
> +       u32 length;
> +       u32 flags;
> +};
> +
> +/*
> + * This represents the "Receive Normal Descriptor (Read Format). The format
> + * written by HW is different, except for the OWN bit in the flags field. Field
> + * naming assumes SW places uses single buffer per descriptor, rather than
> + * separate header/payload buffers, such that a single 64-bit pointer is used.
> + */
> +struct eqos_rx_desc {
> +       u32 buf_lo;
> +       u32 buf_hi;
> +       u32 unused;
> +       u32 flags;
> +};

snip...