[U-Boot] [PATCH v3 3/3] armv8: ls1012a: Added CSU assignment for USB2
Rajesh Bhagat
rajesh.bhagat at nxp.com
Wed Oct 12 12:41:48 CEST 2016
Access settings for USB2 IP is added through CSU register.
Added CSU ID for USB2, reg: CSL23_REG[8:0]
Signed-off-by: Rajesh Bhagat <rajesh.bhagat at nxp.com>
---
Changes in v3:
- Rebased to u-boot-usb master
Changes in v2:
- None
arch/arm/include/asm/arch-fsl-layerscape/ns_access.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
index f46f1d8..3a803e0 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
@@ -39,6 +39,7 @@ enum csu_cslx_ind {
CSU_CSLX_ESDHC,
CSU_CSLX_IFC = 45,
CSU_CSLX_I2C1,
+ CSU_CSLX_USB_2,
CSU_CSLX_I2C3 = 48,
CSU_CSLX_I2C2,
CSU_CSLX_DUART2 = 50,
@@ -118,6 +119,7 @@ static struct csu_ns_dev ns_dev[] = {
{CSU_CSLX_ESDHC, CSU_ALL_RW},
{CSU_CSLX_IFC, CSU_ALL_RW},
{CSU_CSLX_I2C1, CSU_ALL_RW},
+ {CSU_CSLX_USB_2, CSU_ALL_RW},
{CSU_CSLX_I2C3, CSU_ALL_RW},
{CSU_CSLX_I2C2, CSU_ALL_RW},
{CSU_CSLX_DUART2, CSU_ALL_RW},
--
2.6.2.198.g614a2ac
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