[U-Boot] [bug report] sunxi: booting from eMMC

Wed Oct 12 19:49:46 CEST 2016

I decided to check how linux kernel init emmc on marsboard, which i boot from SD card
And i found, that it inited only in 1-bit mode, is it normal? it works, i can edit files on it

linux set 
eMMC(sdc2) to mmc0 
SD(sdc0) to mmc1

# cat /sys/kernel/debug/mmc0/ios    eMMC
clock:          52000000 Hz
vdd:            7 (1.65 - 1.95 V)
bus mode:       2 (push-pull)
chip select:    0 (don't care)
power mode:     2 (on)
bus width:      0 (1 bits)
timing spec:    1 (mmc high-speed)

# cat /sys/kernel/debug/mmc1/ios    SD card
clock:          50000000 Hz
vdd:            16 (2.8 ~ 2.9 V)
bus mode:       2 (push-pull)
chip select:    0 (don't care)
power mode:     2 (on)
bus width:      2 (4 bits)
timing spec:    2 (sd high-speed)

# dmesg | grep 'mmc-msg\|mmc-err’

[    0.167917] [mmc-msg] sw_mci_init
[    0.168039] [mmc-msg] MMC host used card: 0x5, boot card: 0x4, io_card 0
[    0.168310] [mmc-msg] sdc2 set round clock 400000, src 24000000
[    0.168520] [mmc-msg] sdc2 set ios: clk 0Hz bm OD pm OFF vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    0.169639] [mmc-msg] sdc2 Probe: base:0xf005e000 irq:66 sg_cpu:f0060000(4fc00000) ret 0.
[    0.169683] [mmc-msg] sdc2 set ios: clk 0Hz bm PP pm UP vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    0.169695] [mmc-msg] sdc2 power on
[    0.170832] [mmc-msg] sdc0 set round clock 400000, src 24000000
[    0.171037] [mmc-msg] sdc0 set ios: clk 0Hz bm OD pm OFF vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    0.172069] [mmc-msg] sdc0 Probe: base:0xf0062000 irq:64 sg_cpu:f0064000(4fc01000) ret 0.
[    0.182158] [mmc-msg] sdc2 set ios: clk 400000Hz bm PP pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    0.182189] [mmc-msg] sdc2 set round clock 400000, src 24000000
[    0.254447] [mmc-err] smc 2 err, cmd 52,  RTO
[    0.259631] [mmc-err] smc 2 err, cmd 52,  RTO
[    0.264001] [mmc-msg] sdc2 set ios: clk 400000Hz bm PP pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    0.266386] [mmc-msg] sdc2 set ios: clk 400000Hz bm PP pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    0.268208] [mmc-err] smc 2 err, cmd 8,  RTO
[    0.273296] [mmc-err] smc 2 err, cmd 5,  RTO
[    0.278383] [mmc-err] smc 2 err, cmd 5,  RTO
[    0.283461] [mmc-err] smc 2 err, cmd 5,  RTO
[    0.288546] [mmc-err] smc 2 err, cmd 5,  RTO
[    0.293641] [mmc-err] smc 2 err, cmd 55,  RTO
[    0.298813] [mmc-err] smc 2 err, cmd 55,  RTO
[    0.303988] [mmc-err] smc 2 err, cmd 55,  RTO
[    0.309158] [mmc-err] smc 2 err, cmd 55,  RTO
[    0.313529] [mmc-msg] sdc2 set ios: clk 400000Hz bm OD pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    0.313857] [mmc-msg] sdc2 set ios: clk 400000Hz bm OD pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    0.313874] [mmc-msg] sdc2 set ios: clk 400000Hz bm OD pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    0.313889] [mmc-msg] sdc2 set ios: clk 400000Hz bm OD pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    0.316273] [mmc-msg] sdc2 set ios: clk 400000Hz bm OD pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    0.333276] [mmc-msg] sdc2 set ios: clk 400000Hz bm PP pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    0.346076] [mmc-msg] sdc2 set ios: clk 400000Hz bm PP pm ON vdd 3.3V width 1 timing MMC-HS(SDR20) dt B
[    0.346092] [mmc-msg] sdc2 set ios: clk 52000000Hz bm PP pm ON vdd 3.3V width 1 timing MMC-HS(SDR20) dt B
[    0.346123] [mmc-msg] sdc2 set round clock 42857143, src 600000000
[    0.401211] [mmc-msg] sdc2 set ios: clk 52000000Hz bm PP pm ON vdd 3.3V width 8 timing MMC-HS(SDR20) dt B
[    0.401276] [mmc-err] smc 2 err, cmd 8,  DCE EBE
[    0.405889] [mmc-err] In data read operation
[    0.410155] [mmc-msg] found data error, need to send stop command
[    0.410172] [mmc-err] sdc 2 send stop command failed
[    0.415209] [mmc-msg] sdc2 set ios: clk 52000000Hz bm PP pm ON vdd 3.3V width 4 timing MMC-HS(SDR20) dt B
[    0.415284] [mmc-err] smc 2 err, cmd 8,  DCE
[    0.419553] [mmc-err] In data read operation
[    0.423818] [mmc-msg] found data error, need to send stop command
[    0.423834] [mmc-err] sdc 2 send stop command failed
[    0.428862] [mmc-msg] sdc2 set ios: clk 52000000Hz bm PP pm ON vdd 3.3V width 1 timing MMC-HS(SDR20) dt B
[    1.167097] [mmc-msg] mmc 0 detect change, present 1
[    1.662131] [mmc-msg] sdc0 set ios: clk 0Hz bm PP pm UP vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    1.662143] [mmc-msg] sdc0 power on
[    1.682156] [mmc-msg] sdc0 set ios: clk 400000Hz bm PP pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    1.682200] [mmc-msg] sdc0 set round clock 400000, src 24000000
[    1.754452] [mmc-err] smc 0 err, cmd 52,  RTO
[    1.759631] [mmc-err] smc 0 err, cmd 52,  RTO
[    1.764010] [mmc-msg] sdc0 set ios: clk 400000Hz bm PP pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    1.770004] [mmc-msg] sdc0 set ios: clk 400000Hz bm PP pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    1.772136] [mmc-err] smc 0 err, cmd 5,  RTO
[    1.777223] [mmc-err] smc 0 err, cmd 5,  RTO
[    1.782306] [mmc-err] smc 0 err, cmd 5,  RTO
[    1.787390] [mmc-err] smc 0 err, cmd 5,  RTO
[    1.792296] [mmc-msg] sdc0 set ios: clk 400000Hz bm PP pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    1.792315] [mmc-msg] sdc0 set ios: clk 400000Hz bm PP pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    1.794700] [mmc-msg] sdc0 set ios: clk 400000Hz bm PP pm ON vdd 3.3V width 1 timing LEGACY(SDR12) dt B
[    1.824841] [mmc-msg] sdc0 set ios: clk 400000Hz bm PP pm ON vdd 3.3V width 1 timing SD-HS(SDR25) dt B
[    1.824859] [mmc-msg] sdc0 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 1 timing SD-HS(SDR25) dt B
[    1.824901] [mmc-msg] sdc0 set round clock 42857143, src 600000000
[    1.879993] [mmc-msg] sdc0 set ios: clk 50000000Hz bm PP pm ON vdd 3.3V width 4 timing SD-HS(SDR25) dt B