[U-Boot] [PATCH 3/8] arm: Remove zipitz2 board

Simon Glass sjg at chromium.org
Thu Oct 20 21:06:55 CEST 2016


This board has not been converted to DM_SERIAL by the deadline.
Remove it.

Signed-off-by: Simon Glass <sjg at chromium.org>
---

 arch/arm/Kconfig          |   5 --
 board/zipitz2/Kconfig     |   9 --
 board/zipitz2/MAINTAINERS |   6 --
 board/zipitz2/Makefile    |  10 ---
 board/zipitz2/zipitz2.c   | 217 ----------------------------------------------
 configs/zipitz2_defconfig |  19 ----
 include/configs/zipitz2.h | 213 ---------------------------------------------
 7 files changed, 479 deletions(-)
 delete mode 100644 board/zipitz2/Kconfig
 delete mode 100644 board/zipitz2/MAINTAINERS
 delete mode 100644 board/zipitz2/Makefile
 delete mode 100644 board/zipitz2/zipitz2.c
 delete mode 100644 configs/zipitz2_defconfig
 delete mode 100644 include/configs/zipitz2.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 26c8e2f..cd582a7 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -805,10 +805,6 @@ config TARGET_LS1046ARDB
 	  development platform that supports the QorIQ LS1046A
 	  Layerscape Architecture processor.
 
-config TARGET_ZIPITZ2
-	bool "Support zipitz2"
-	select CPU_PXA
-
 config ARCH_UNIPHIER
 	bool "Socionext UniPhier SoCs"
 	select BLK
@@ -1009,7 +1005,6 @@ source "board/technologic/ts4800/Kconfig"
 source "board/vscom/baltos/Kconfig"
 source "board/woodburn/Kconfig"
 source "board/work-microwave/work_92105/Kconfig"
-source "board/zipitz2/Kconfig"
 
 source "arch/arm/Kconfig.debug"
 
diff --git a/board/zipitz2/Kconfig b/board/zipitz2/Kconfig
deleted file mode 100644
index c663504..0000000
--- a/board/zipitz2/Kconfig
+++ /dev/null
@@ -1,9 +0,0 @@
-if TARGET_ZIPITZ2
-
-config SYS_BOARD
-	default "zipitz2"
-
-config SYS_CONFIG_NAME
-	default "zipitz2"
-
-endif
diff --git a/board/zipitz2/MAINTAINERS b/board/zipitz2/MAINTAINERS
deleted file mode 100644
index e027cd3..0000000
--- a/board/zipitz2/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-ZIPITZ2 BOARD
-M:	Vasily Khoruzhick <anarsoul at gmail.com>
-S:	Maintained
-F:	board/zipitz2/
-F:	include/configs/zipitz2.h
-F:	configs/zipitz2_defconfig
diff --git a/board/zipitz2/Makefile b/board/zipitz2/Makefile
deleted file mode 100644
index 855f6bc..0000000
--- a/board/zipitz2/Makefile
+++ /dev/null
@@ -1,10 +0,0 @@
-#
-# Copyright (C) 2009
-# Marek Vasut <marek.vasut at gmail.com>
-#
-# Heavily based on pxa255_idp platform
-#
-# SPDX-License-Identifier:	GPL-2.0+
-#
-
-obj-y	:= zipitz2.o
diff --git a/board/zipitz2/zipitz2.c b/board/zipitz2/zipitz2.c
deleted file mode 100644
index d3ca939..0000000
--- a/board/zipitz2/zipitz2.c
+++ /dev/null
@@ -1,217 +0,0 @@
-/*
- * Copyright (C) 2009
- * Marek Vasut <marek.vasut at gmail.com>
- *
- * Heavily based on pxa255_idp platform
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <common.h>
-#include <command.h>
-#include <serial.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/pxa.h>
-#include <asm/arch/regs-mmc.h>
-#include <spi.h>
-#include <asm/io.h>
-#include <usb.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#ifdef	CONFIG_CMD_SPI
-void lcd_start(void);
-#else
-inline void lcd_start(void) {};
-#endif
-
-/*
- * Miscelaneous platform dependent initialisations
- */
-int board_init(void)
-{
-	/* arch number of Z2 */
-	gd->bd->bi_arch_number = MACH_TYPE_ZIPIT2;
-
-	/* adress of boot parameters */
-	gd->bd->bi_boot_params = 0xa0000100;
-
-	/* Enable LCD */
-	lcd_start();
-
-	return 0;
-}
-
-int dram_init(void)
-{
-	pxa2xx_dram_init();
-	gd->ram_size = PHYS_SDRAM_1_SIZE;
-	return 0;
-}
-
-#ifdef	CONFIG_CMD_USB
-int board_usb_init(int index, enum usb_init_type init)
-{
-	/* enable port 2 */
-	writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS |
-		UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR);
-
-	return 0;
-}
-
-int board_usb_cleanup(int index, enum usb_init_type init)
-{
-	return 0;
-}
-
-void usb_board_stop(void)
-{
-}
-#endif
-
-void dram_init_banksize(void)
-{
-	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-}
-
-#ifdef	CONFIG_CMD_MMC
-int board_mmc_init(bd_t *bis)
-{
-	pxa_mmc_register(0);
-	return 0;
-}
-#endif
-
-#ifdef	CONFIG_CMD_SPI
-
-struct {
-	unsigned char	reg;
-	unsigned short	data;
-	unsigned char	mdelay;
-} lcd_data[] = {
-	{ 0x07,	0x0000,	0 },
-	{ 0x13,	0x0000,	10 },
-	{ 0x11,	0x3004,	0 },
-	{ 0x14,	0x200F,	0 },
-	{ 0x10,	0x1a20,	0 },
-	{ 0x13,	0x0040,	50 },
-	{ 0x13,	0x0060,	0 },
-	{ 0x13,	0x0070,	200 },
-	{ 0x01,	0x0127,	0 },
-	{ 0x02,	0x0700,	0 },
-	{ 0x03,	0x1030,	0 },
-	{ 0x08,	0x0208,	0 },
-	{ 0x0B,	0x0620,	0 },
-	{ 0x0C,	0x0110,	0 },
-	{ 0x30,	0x0120,	0 },
-	{ 0x31,	0x0127,	0 },
-	{ 0x32,	0x0000,	0 },
-	{ 0x33,	0x0503,	0 },
-	{ 0x34,	0x0727,	0 },
-	{ 0x35,	0x0124,	0 },
-	{ 0x36,	0x0706,	0 },
-	{ 0x37,	0x0701,	0 },
-	{ 0x38,	0x0F00,	0 },
-	{ 0x39,	0x0F00,	0 },
-	{ 0x40,	0x0000,	0 },
-	{ 0x41,	0x0000,	0 },
-	{ 0x42,	0x013f,	0 },
-	{ 0x43,	0x0000,	0 },
-	{ 0x44,	0x013f,	0 },
-	{ 0x45,	0x0000,	0 },
-	{ 0x46,	0xef00,	0 },
-	{ 0x47,	0x013f,	0 },
-	{ 0x48,	0x0000,	0 },
-	{ 0x07,	0x0015,	30 },
-	{ 0x07,	0x0017,	0 },
-	{ 0x20,	0x0000,	0 },
-	{ 0x21,	0x0000,	0 },
-	{ 0x22,	0x0000,	0 },
-};
-
-void zipitz2_spi_sda(int set)
-{
-	/* GPIO 13 */
-	if (set)
-		writel((1 << 13), GPSR0);
-	else
-		writel((1 << 13), GPCR0);
-}
-
-void zipitz2_spi_scl(int set)
-{
-	/* GPIO 22 */
-	if (set)
-		writel((1 << 22), GPCR0);
-	else
-		writel((1 << 22), GPSR0);
-}
-
-unsigned char zipitz2_spi_read(void)
-{
-	/* GPIO 40 */
-	return !!(readl(GPLR1) & (1 << 8));
-}
-
-int spi_cs_is_valid(unsigned int bus, unsigned int cs)
-{
-	/* Always valid */
-	return 1;
-}
-
-void spi_cs_activate(struct spi_slave *slave)
-{
-	/* GPIO 88 low */
-	writel((1 << 24), GPCR2);
-}
-
-void spi_cs_deactivate(struct spi_slave *slave)
-{
-	/* GPIO 88 high */
-	writel((1 << 24), GPSR2);
-}
-
-void lcd_start(void)
-{
-	int i;
-	unsigned char reg[3] = { 0x74, 0x00, 0 };
-	unsigned char data[3] = { 0x76, 0, 0 };
-	unsigned char dummy[3] = { 0, 0, 0 };
-
-	/* PWM2 AF */
-	writel(readl(GAFR0_L) | 0x00800000, GAFR0_L);
-	/* Enable clock to all PWM */
-	writel(readl(CKEN) | 0x3, CKEN);
-	/* Configure PWM2 */
-	writel(0x4f, PWM_CTRL2);
-	writel(0x2ff, PWM_PWDUTY2);
-	writel(792, PWM_PERVAL2);
-
-	/* Toggle the reset pin to reset the LCD */
-	writel((1 << 19), GPSR0);
-	udelay(100000);
-	writel((1 << 19), GPCR0);
-	udelay(20000);
-	writel((1 << 19), GPSR0);
-	udelay(20000);
-
-	/* Program the LCD init sequence */
-	for (i = 0; i < sizeof(lcd_data) / sizeof(lcd_data[0]); i++) {
-		reg[0] = 0x74;
-		reg[1] = 0x0;
-		reg[2] = lcd_data[i].reg;
-		spi_xfer(NULL, 24, reg, dummy, SPI_XFER_BEGIN | SPI_XFER_END);
-
-		data[0] = 0x76;
-		data[1] = lcd_data[i].data >> 8;
-		data[2] = lcd_data[i].data & 0xff;
-		spi_xfer(NULL, 24, data, dummy, SPI_XFER_BEGIN | SPI_XFER_END);
-
-		if (lcd_data[i].mdelay)
-			udelay(lcd_data[i].mdelay * 1000);
-	}
-
-	writel((1 << 11), GPSR0);
-}
-#endif
diff --git a/configs/zipitz2_defconfig b/configs/zipitz2_defconfig
deleted file mode 100644
index d9819a5..0000000
--- a/configs/zipitz2_defconfig
+++ /dev/null
@@ -1,19 +0,0 @@
-CONFIG_ARM=y
-CONFIG_TARGET_ZIPITZ2=y
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_HUSH_PARSER=y
-CONFIG_SYS_PROMPT="$ "
-# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_USB=y
-# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
-CONFIG_USB=y
-CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
-# CONFIG_EFI_LOADER is not set
diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h
deleted file mode 100644
index 6e83cc9..0000000
--- a/include/configs/zipitz2.h
+++ /dev/null
@@ -1,213 +0,0 @@
-/*
- * Aeronix Zipit Z2 configuration file
- *
- * Copyright (C) 2009-2010 Marek Vasut <marek.vasut at gmail.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Board Configuration Options
- */
-#define	CONFIG_CPU_PXA27X		1	/* Marvell PXA270 CPU */
-#define	CONFIG_SYS_TEXT_BASE		0x0
-
-#undef	CONFIG_BOARD_LATE_INIT
-#undef	CONFIG_SKIP_LOWLEVEL_INIT
-#define	CONFIG_PREBOOT
-
-/*
- * Environment settings
- */
-#define	CONFIG_ENV_OVERWRITE
-#define CONFIG_ENV_IS_IN_FLASH		1
-#define CONFIG_ENV_ADDR			0x40000
-#define CONFIG_ENV_SIZE			0x10000
-
-#define	CONFIG_SYS_MALLOC_LEN		(128*1024)
-#define	CONFIG_ARCH_CPU_INIT
-
-#define	CONFIG_BOOTCOMMAND						\
-	"if mmc rescan && ext2load mmc 0 0xa0000000 boot/uboot.script ;"\
-	"then "								\
-		"source 0xa0000000; "					\
-	"else "								\
-		"bootm 0x50000; "					\
-	"fi; "
-#define	CONFIG_BOOTARGS							\
-	"console=tty0 console=ttyS2,115200 fbcon=rotate:3"
-#define	CONFIG_TIMESTAMP
-#define	CONFIG_CMDLINE_TAG
-#define	CONFIG_SETUP_MEMORY_TAGS
-#define	CONFIG_SYS_TEXT_BASE		0x0
-#define	CONFIG_LZMA			/* LZMA compression support */
-
-/*
- * Serial Console Configuration
- * STUART - the lower serial port on Colibri board
- */
-#define	CONFIG_PXA_SERIAL
-#define	CONFIG_STUART			1
-#define CONFIG_CONS_INDEX		2
-#define	CONFIG_BAUDRATE			115200
-
-/*
- * Bootloader Components Configuration
- */
-#define	CONFIG_CMD_ENV
-
-/*
- * MMC Card Configuration
- */
-#ifdef	CONFIG_CMD_MMC
-#define	CONFIG_MMC
-#define	CONFIG_GENERIC_MMC
-#define	CONFIG_PXA_MMC_GENERIC
-#define	CONFIG_SYS_MMC_BASE		0xF0000000
-#define	CONFIG_DOS_PARTITION
-#endif
-
-/*
- * SPI and LCD
- */
-#ifdef	CONFIG_CMD_SPI
-#define	CONFIG_SOFT_SPI
-#define	CONFIG_LCD
-#define	CONFIG_LCD_ROTATION
-#define	CONFIG_PXA_LCD
-#define	CONFIG_LMS283GF05
-
-#define	SPI_DELAY	udelay(10)
-#define	SPI_SDA(val)	zipitz2_spi_sda(val)
-#define	SPI_SCL(val)	zipitz2_spi_scl(val)
-#define	SPI_READ	zipitz2_spi_read()
-#ifndef	__ASSEMBLY__
-void zipitz2_spi_sda(int);
-void zipitz2_spi_scl(int);
-unsigned char zipitz2_spi_read(void);
-#endif
-#endif
-
-#define	CONFIG_SYS_LONGHELP				/* undef to save memory	*/
-#define	CONFIG_SYS_CBSIZE		256		/* Console I/O Buffer Size */
-#define	CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)	/* Print Buffer Size */
-#define	CONFIG_SYS_MAXARGS		16		/* max number of command args */
-#define	CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size */
-#define	CONFIG_SYS_DEVICE_NULLDEV	1
-
-/*
- * Clock Configuration
- */
-#define CONFIG_SYS_CPUSPEED		0x190		/* standard setting for 312MHz; L=16, N=1.5, A=0, SDCLK!=SystemBus */
-
-/*
- * SRAM Map
- */
-#define	PHYS_SRAM			0x5c000000	/* SRAM Bank #1 */
-#define	PHYS_SRAM_SIZE			0x00040000	/* 256k */
-
-/*
- * DRAM Map
- */
-#define	CONFIG_NR_DRAM_BANKS		1		/* We have 1 bank of DRAM */
-#define	PHYS_SDRAM_1			0xa0000000	/* SDRAM Bank #1 */
-#define	PHYS_SDRAM_1_SIZE		0x02000000	/* 32 MB */
-
-#define	CONFIG_SYS_DRAM_BASE		0xa0000000	/* CS0 */
-#define	CONFIG_SYS_DRAM_SIZE		0x02000000	/* 32 MB DRAM */
-
-#define CONFIG_SYS_MEMTEST_START	0xa0400000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0xa0800000	/* 4 ... 8 MB in DRAM */
-
-#define	CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_DRAM_BASE
-
-#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
-#define	CONFIG_SYS_INIT_SP_ADDR		(GENERATED_GBL_DATA_SIZE + PHYS_SRAM + 2048)
-
-/*
- * NOR FLASH
- */
-#define PHYS_FLASH_1			0x00000000	/* Flash Bank #1 */
-#define PHYS_FLASH_SIZE			0x00800000	/* 8 MB */
-#define PHYS_FLASH_SECT_SIZE		0x00010000	/* 64 KB sectors */
-#define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1
-
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_FLASH_CFI_DRIVER		1
-#define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_16BIT
-
-#define CONFIG_SYS_MONITOR_BASE		PHYS_FLASH_1
-#define CONFIG_SYS_MONITOR_LEN		PHYS_FLASH_SECT_SIZE
-
-#define CONFIG_SYS_MAX_FLASH_BANKS	1
-#define CONFIG_SYS_MAX_FLASH_SECT	256
-
-#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	1
-
-#define CONFIG_SYS_FLASH_ERASE_TOUT	240000
-#define CONFIG_SYS_FLASH_WRITE_TOUT	240000
-#define CONFIG_SYS_FLASH_LOCK_TOUT	240000
-#define CONFIG_SYS_FLASH_UNLOCK_TOUT	240000
-#define CONFIG_SYS_FLASH_PROTECTION
-
-/*
- * GPIO settings
- */
-#define CONFIG_SYS_GAFR0_L_VAL	0x02000140
-#define CONFIG_SYS_GAFR0_U_VAL	0x59188000
-#define CONFIG_SYS_GAFR1_L_VAL	0x63900002
-#define CONFIG_SYS_GAFR1_U_VAL	0xaaa03950
-#define CONFIG_SYS_GAFR2_L_VAL	0x0aaaaaaa
-#define CONFIG_SYS_GAFR2_U_VAL	0x29000308
-#define CONFIG_SYS_GAFR3_L_VAL	0x54000000
-#define CONFIG_SYS_GAFR3_U_VAL	0x000000d5
-#define CONFIG_SYS_GPCR0_VAL	0x00000000
-#define CONFIG_SYS_GPCR1_VAL	0x00000020
-#define CONFIG_SYS_GPCR2_VAL	0x00000000
-#define CONFIG_SYS_GPCR3_VAL	0x00000000
-#define CONFIG_SYS_GPDR0_VAL	0xdafcee00
-#define CONFIG_SYS_GPDR1_VAL	0xffa3aaab
-#define CONFIG_SYS_GPDR2_VAL	0x8fe9ffff
-#define CONFIG_SYS_GPDR3_VAL	0x001b1f8a
-#define CONFIG_SYS_GPSR0_VAL	0x06080400
-#define CONFIG_SYS_GPSR1_VAL	0x007f0000
-#define CONFIG_SYS_GPSR2_VAL	0x032a0000
-#define CONFIG_SYS_GPSR3_VAL	0x00000180
-
-#define CONFIG_SYS_PSSR_VAL	0x30
-
-/*
- * Clock settings
- */
-#define CONFIG_SYS_CKEN		0x00511220
-#define CONFIG_SYS_CCCR		0x00000190
-
-/*
- * Memory settings
- */
-#define CONFIG_SYS_MSC0_VAL	0x2ffc38f8
-#define CONFIG_SYS_MSC1_VAL	0x0000ccd1
-#define CONFIG_SYS_MSC2_VAL	0x0000b884
-#define CONFIG_SYS_MDCNFG_VAL	0x08000ba9
-#define CONFIG_SYS_MDREFR_VAL	0x2011a01e
-#define CONFIG_SYS_MDMRS_VAL	0x00000000
-#define CONFIG_SYS_FLYCNFG_VAL	0x00010001
-#define CONFIG_SYS_SXCNFG_VAL	0x40044004
-
-/*
- * PCMCIA and CF Interfaces
- */
-#define CONFIG_SYS_MECR_VAL	0x00000001
-#define CONFIG_SYS_MCMEM0_VAL	0x00014307
-#define CONFIG_SYS_MCMEM1_VAL	0x00014307
-#define CONFIG_SYS_MCATT0_VAL	0x0001c787
-#define CONFIG_SYS_MCATT1_VAL	0x0001c787
-#define CONFIG_SYS_MCIO0_VAL	0x0001430f
-#define CONFIG_SYS_MCIO1_VAL	0x0001430f
-
-#include "pxa-common.h"
-
-#endif	/* __CONFIG_H */
-- 
2.8.0.rc3.226.g39d4020



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