[U-Boot] [PATCH] fsl_qman: Implement device tree fixup for QBMan on ARM processors

Roy Pledge roy.pledge at nxp.com
Wed Oct 26 16:01:19 CEST 2016


Add support for device tree fixup for the DPAA1 QBMan nodes in ARM platforms

Signed-off-by: Roy Pledge <roy.pledge at nxp.com>
---
 arch/arm/cpu/armv8/fsl-layerscape/fdt.c            |   89 ++++++++++++++++++++
 .../arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c |    3 +
 .../include/asm/arch-fsl-layerscape/immap_lsch2.h  |    2 +
 include/configs/ls1043a_common.h                   |    2 +
 4 files changed, 96 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
index 1a8321b..aedf0e7 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
@@ -25,6 +25,8 @@
 #ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
 #include <asm/armv8/sec_firmware.h>
 #endif
+#include <asm/io.h>
+#include <asm/arch/speed.h>
 
 int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)
 {
@@ -32,6 +34,80 @@ int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)
 					 phy_string_for_interface(phyc));
 }
 
+#if defined(CONFIG_SYS_DPAA_QBMAN)
+
+#define BMAN_IP_REV_1 0xBF8
+#define BMAN_IP_REV_2 0xBFC
+void fdt_fixup_bportals(void *blob)
+{
+	int off, err;
+	unsigned int maj, min;
+	unsigned int ip_cfg;
+
+	u32 rev_1 = in_be32(CONFIG_SYS_FSL_BMAN_ADDR + BMAN_IP_REV_1);
+	u32 rev_2 = in_be32(CONFIG_SYS_FSL_BMAN_ADDR + BMAN_IP_REV_2);
+	char compat[64];
+	int compat_len;
+
+	maj = (rev_1 >> 8) & 0xff;
+	min = rev_1 & 0xff;
+
+	ip_cfg = rev_2 & 0xff;
+
+	compat_len = sprintf(compat, "fsl,bman-portal-%u.%u.%u",
+			     maj, min, ip_cfg) + 1;
+	compat_len += sprintf(compat + compat_len, "fsl,bman-portal") + 1;
+
+	off = fdt_node_offset_by_compatible(blob, -1, "fsl,bman-portal");
+	while (off != -FDT_ERR_NOTFOUND) {
+		err = fdt_setprop(blob, off, "compatible", compat, compat_len);
+		if (err < 0) {
+			printf("ERROR: unable to create props for %s: %s\n",
+			       fdt_get_name(blob, off, NULL),
+			       fdt_strerror(err));
+			return;
+		}
+
+		off = fdt_node_offset_by_compatible(blob, off,
+						    "fsl,bman-portal");
+	}
+}
+
+#define QMAN_IP_REV_1 0xBF8
+#define QMAN_IP_REV_2 0xBFC
+void fdt_fixup_qportals(void *blob)
+{
+	int off, err;
+	unsigned int maj, min;
+	unsigned int ip_cfg;
+	u32 rev_1 = in_be32(CONFIG_SYS_FSL_QMAN_ADDR + QMAN_IP_REV_1);
+	u32 rev_2 = in_be32(CONFIG_SYS_FSL_QMAN_ADDR + QMAN_IP_REV_2);
+	char compat[64];
+	int compat_len;
+
+	maj = (rev_1 >> 8) & 0xff;
+	min = rev_1 & 0xff;
+	ip_cfg = rev_2 & 0xff;
+
+	compat_len = sprintf(compat, "fsl,qman-portal-%u.%u.%u",
+			     maj, min, ip_cfg) + 1;
+	compat_len += sprintf(compat + compat_len, "fsl,qman-portal") + 1;
+
+	off = fdt_node_offset_by_compatible(blob, -1, "fsl,qman-portal");
+	while (off != -FDT_ERR_NOTFOUND) {
+		err = fdt_setprop(blob, off, "compatible", compat, compat_len);
+		if (err < 0) {
+			printf("ERROR: unable to create props for %s: %s\n",
+			       fdt_get_name(blob, off, NULL),
+			       fdt_strerror(err));
+			return;
+		}
+		off = fdt_node_offset_by_compatible(blob, off,
+						    "fsl,qman-portal");
+	}
+}
+#endif
+
 #ifdef CONFIG_MP
 void ft_fixup_cpu(void *blob)
 {
@@ -145,6 +221,12 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 #endif
 #endif
 
+#if defined(CONFIG_SYS_DPAA_QBMAN)
+	struct sys_info sysinfo;
+
+	get_sys_info(&sysinfo);
+#endif
+
 #ifdef CONFIG_MP
 	ft_fixup_cpu(blob);
 #endif
@@ -165,6 +247,13 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 	fdt_fixup_esdhc(blob, bd);
 #endif
 
+#if defined(CONFIG_SYS_DPAA_QBMAN)
+	fdt_fixup_bportals(blob);
+	fdt_fixup_qportals(blob);
+	do_fixup_by_compat_u32(blob, "fsl,qman",
+			       "clock-frequency", sysinfo.freq_qman, 1);
+#endif
+
 #ifdef CONFIG_SYS_DPAA_FMAN
 	fdt_fixup_fman_firmware(blob);
 #endif
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
index 55005f0..cf10a78 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
@@ -158,6 +158,9 @@ void get_sys_info(struct sys_info *sys_info)
 
 	sys_info->freq_localbus = sys_info->freq_systembus / ccr;
 #endif
+#ifdef CONFIG_SYS_DPAA_QBMAN
+	sys_info->freq_qman = sys_info->freq_systembus;
+#endif
 }
 
 int get_clocks(void)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index d88543d..b85ef3a 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -23,6 +23,8 @@
 #define CONFIG_SYS_FSL_GUTS_ADDR		(CONFIG_SYS_IMMR + 0x00ee0000)
 #define CONFIG_SYS_FSL_RST_ADDR			(CONFIG_SYS_IMMR + 0x00ee00b0)
 #define CONFIG_SYS_FSL_SCFG_ADDR		(CONFIG_SYS_IMMR + 0x00570000)
+#define CONFIG_SYS_FSL_BMAN_ADDR                (CONFIG_SYS_IMMR + 0x00890000)
+#define CONFIG_SYS_FSL_QMAN_ADDR                (CONFIG_SYS_IMMR + 0x00880000)
 #define CONFIG_SYS_FSL_FMAN_ADDR		(CONFIG_SYS_IMMR + 0x00a00000)
 #define CONFIG_SYS_FSL_SERDES_ADDR		(CONFIG_SYS_IMMR + 0x00ea0000)
 #define CONFIG_SYS_FSL_DCFG_ADDR		(CONFIG_SYS_IMMR + 0x00ee0000)
diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index 0fd69bf..faf79eb 100644
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -176,6 +176,8 @@
 
 #define CONFIG_FSL_CAAM			/* Enable SEC/CAAM */
 
+#define CONFIG_SYS_DPAA_QBMAN		/* Support Q/Bman */
+
 /* FMan ucode */
 #define CONFIG_SYS_DPAA_FMAN
 #ifdef CONFIG_SYS_DPAA_FMAN
-- 
1.7.9.5



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