[U-Boot] [PATCH] powerpc/t2080: DDR controller erratum A-009942

[Hamish Martin]

On 10/27/2016 05:33 AM, york sun wrote:
> On 10/21/2016 04:37 PM, york sun wrote:
>> On 10/18/2016 07:48 PM, Hamish Martin wrote:
>>> This erratum is already implemented for other ARM based QorIQ
>>> platforms with the Gen4 DDR controller. Port the fix to the Gen3
>>> controller and enable it for T2080 and T2081.
>>>
>>> Reviewed-by: Chris Packham <chris.packham at alliedtelesis.co.nz>
>>> Signed-off-by: Hamish Martin <hamish.martin at alliedtelesis.co.nz>
>>> Cc: York Sun <york.sun at nxp.com>
>>> ---
>>>   arch/powerpc/cpu/mpc85xx/cmd_errata.c     |  3 +++
>>>   arch/powerpc/include/asm/config_mpc85xx.h |  1 +
>>>   drivers/ddr/fsl/mpc85xx_ddr_gen3.c        | 17 +++++++++++++++++
>>>   3 files changed, 21 insertions(+)
>>>
>>> diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
>>> index 3b06ae42e4bc..94b6dcca96b6 100644
>>> --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
>>> +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
>>> @@ -329,6 +329,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
>>>   #ifdef CONFIG_SYS_FSL_ERRATUM_A009663
>>>   	puts("Work-around for Erratum A009663 enabled\n");
>>>   #endif
>>> +#ifdef CONFIG_SYS_FSL_ERRATUM_A009942
>>> +	puts("Work-around for Erratum A009942 enabled\n");
>>> +#endif
>>>
>>>   	return 0;
>>>   }
>>> diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
>>> index 6d845e859f4a..9e1cd80e16e0 100644
>>> --- a/arch/powerpc/include/asm/config_mpc85xx.h
>>> +++ b/arch/powerpc/include/asm/config_mpc85xx.h
>>> @@ -910,6 +910,7 @@ defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013)
>>>   #define CONFIG_SYS_FSL_ERRATUM_A006593
>>>   #define CONFIG_SYS_FSL_ERRATUM_A007186
>>>   #define CONFIG_SYS_FSL_ERRATUM_A006379
>>> +#define CONFIG_SYS_FSL_ERRATUM_A009942
>>>   #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE
>>>   #define CONFIG_SYS_FSL_SFP_VER_3_0
>>>
>> Thanks for fixing it. Please also enable this workaround for T1024,
>> T2080, T1040, B4420, B4860, T4240 (and change the subject accordingly).
> A second thought, NXP is updating this erratum workaround. A new patch
> will be sent out. Thanks for bring it up.
>
> York
Just to clarify, should I abandon this patch because you (or someone 
else from NXP) will provide a better, more comprehensive fix?

Thanks,
Hamish M.