[U-Boot] [PATCH 02/11] sunxi: add gtbus-initialisation for sun9i

Jagan Teki jagan at openedev.com
Fri Oct 28 20:45:44 CEST 2016


On Fri, Oct 28, 2016 at 3:51 PM, Chen-Yu Tsai <wens at csie.org> wrote:
> From: Philipp Tomsich <philipp.tomsich at theobroma-systems.com>
>
> On sun9i, the GTBUS manages transaction priority and bandwidth
> for multiple read ports when accessing DRAM. The initialisation
> mirrors the settings from Allwinner's boot0 for now, even though
> this may not be optimal for all applications (e.g. headless
> systems might want to give priority to IO modules).
>
> Adding a common callout to gtbus_init() from the SPL clock init
> with a weakly defined implementation in sunxi/clock.c to fallback
> to for platforms that don't require this.
>
> [wens at csie.org: Moved gtbus_sun9i.c to arch/arm/mach-sunxi/; style cleanup]
> Signed-off-by: Chen-Yu Tsai <wens at csie.org>
> ---
>  arch/arm/include/asm/arch-sunxi/cpu_sun9i.h   |  2 +
>  arch/arm/include/asm/arch-sunxi/gtbus.h       | 21 +++++++
>  arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h | 89 +++++++++++++++++++++++++++
>  arch/arm/mach-sunxi/Makefile                  |  1 +
>  arch/arm/mach-sunxi/clock.c                   |  6 ++
>  arch/arm/mach-sunxi/gtbus_sun9i.c             | 48 +++++++++++++++
>  6 files changed, 167 insertions(+)
>  create mode 100644 arch/arm/include/asm/arch-sunxi/gtbus.h
>  create mode 100644 arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h
>  create mode 100644 arch/arm/mach-sunxi/gtbus_sun9i.c
>
> diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h
> index acbc94f4c3b8..ba18a0f551ad 100644
> --- a/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h
> +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h
> @@ -23,6 +23,8 @@
>  #define SUNXI_NFC_BASE                 (REGS_AHB0_BASE + 0x3000)
>  #define SUNXI_TSC_BASE                 (REGS_AHB0_BASE + 0x4000)
>
> +#define SUNXI_GTBUS_BASE               (REGS_AHB0_BASE + 0x9000)
> +
>  #define SUNXI_MMC0_BASE                        (REGS_AHB0_BASE + 0x0f000)
>  #define SUNXI_MMC1_BASE                        (REGS_AHB0_BASE + 0x10000)
>  #define SUNXI_MMC2_BASE                        (REGS_AHB0_BASE + 0x11000)
> diff --git a/arch/arm/include/asm/arch-sunxi/gtbus.h b/arch/arm/include/asm/arch-sunxi/gtbus.h
> new file mode 100644
> index 000000000000..b8308d513545
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-sunxi/gtbus.h
> @@ -0,0 +1,21 @@
> +/*
> + * GTBUS initialisation
> + *
> + * (C) Copyright 2016 Theobroma Systems Design und Consulting GmbH
> + *                    Philipp Tomsich <philipp.tomsich at theobroma-systems.com>
> + *
> + * SPDX-License-Identifier:    GPL-2.0+
> + */
> +
> +#ifndef _SUNXI_GTBUS_H
> +#define _SUNXI_GTBUS_H
> +
> +#if defined(CONFIG_MACH_SUN9I)
> +#include <asm/arch/gtbus_sun9i.h>
> +#endif
> +
> +#ifndef __ASSEMBLY__
> +void gtbus_init(void);
> +#endif
> +
> +#endif
> diff --git a/arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h b/arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h
> new file mode 100644
> index 000000000000..91bc2bdb5103
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-sunxi/gtbus_sun9i.h
> @@ -0,0 +1,89 @@
> +/*
> + * GTBUS initialisation for sun9i
> + *
> + * (C) Copyright 2016 Theobroma Systems Design und Consulting GmbH
> + *                    Philipp Tomsich <philipp.tomsich at theobroma-systems.com>
> + *
> + * SPDX-License-Identifier:    GPL-2.0+
> + */
> +
> +#ifndef _SUNXI_GTBUS_SUN9I_H
> +#define _SUNXI_GTBUS_SUN9I_H
> +
> +#include <linux/types.h>
> +
> +struct sunxi_gtbus_reg {
> +       u32 mst_cfg[36];           /* 0x000 */
> +       u8  reserved1[0x70];       /* 0x090 */
> +       u32 bw_wdw_cfg;            /* 0x100 */
> +       u32 mst_read_prio_cfg[2];  /* 0x104 */
> +       u32 lvl2_mst_cfg;          /* 0x10c */
> +       u32 sw_clk_on;             /* 0x110 */
> +       u32 sw_clk_off;            /* 0x114 */
> +       u32 pmu_mst_en;            /* 0x118 */
> +       u32 pmu_cfg;               /* 0x11c */
> +       u32 pmu_cnt[19];           /* 0x120 */
> +       u32 reserved2[0x94];       /* 0x16c */
> +       u32 cci400_config[3];      /* 0x200 */
> +       u32 cci400_status[2];      /* 0x20c */
> +};
> +
> +/* for register GT_MST_CFG_REG(n) */
> +#define GT_ENABLE_REQ           (1<<31) /* clock on */
> +#define GT_DISABLE_REQ          (1<<30) /* clock off */
> +#define GT_QOS_SHIFT            28
> +#define GT_THD1_SHIFT           16
> +#define GT_REQN_MAX             0xf     /* max number master requests in one cycle */
> +#define GT_REQN_SHIFT           12
> +#define GT_THD0_SHIFT           0
> +
> +#define GT_QOS_MAX              0x3
> +#define GT_THD_MAX              0xfff
> +#define GT_BW_WDW_MAX           0xffff
> +
> +/* mst_read_prio_cfg */
> +#define GT_PRIO_LOW     0
> +#define GT_PRIO_HIGH    1
> +
> +/* GTBUS port ids */
> +#define GT_PORT_CPUM1   0
> +#define GT_PORT_CPUM2   1
> +#define GT_PORT_SATA    2
> +#define        GT_PORT_USB3    3
> +#define        GT_PORT_FE0     4
> +#define        GT_PORT_BE1     5
> +#define        GT_PORT_BE2     6
> +#define        GT_PORT_IEP0    7
> +#define        GT_PORT_FE1     8
> +#define        GT_PORT_BE0     9
> +#define        GT_PORT_FE2     10
> +#define        GT_PORT_IEP1    11
> +#define        GT_PORT_VED     12
> +#define        GT_PORT_VEE     13
> +#define        GT_PORT_FD      14
> +#define        GT_PORT_CSI     15
> +#define        GT_PORT_MP      16
> +#define        GT_PORT_HSI     17
> +#define        GT_PORT_SS      18
> +#define        GT_PORT_TS      19
> +#define        GT_PORT_DMA     20
> +#define        GT_PORT_NDFC0   21
> +#define        GT_PORT_NDFC1   22
> +#define        GT_PORT_CPUS    23
> +#define        GT_PORT_TH      24
> +#define        GT_PORT_GMAC    25
> +#define        GT_PORT_USB0    26
> +#define        GT_PORT_MSTG0   27
> +#define        GT_PORT_MSTG1   28
> +#define        GT_PORT_MSTG2   29
> +#define        GT_PORT_MSTG3   30
> +#define        GT_PORT_USB1    31
> +#define        GT_PORT_GPU0    32
> +#define        GT_PORT_GPU1    33
> +#define        GT_PORT_USB2    34
> +#define        GT_PORT_CPUM0   35
> +
> +#define GP_MST_CFG_DEFAULT   ((GT_QOS_MAX << GT_QOS_SHIFT) | (GT_THD_MAX << GT_THD1_SHIFT) \
> +                             | (GT_REQN_MAX << GT_REQN_SHIFT) | (GT_THD_MAX << GT_THD0_SHIFT))

Please re-organize the macro, look confusing and crossed 80+line.

> +
> +#endif
> diff --git a/arch/arm/mach-sunxi/Makefile b/arch/arm/mach-sunxi/Makefile
> index 9d07d6b84c1e..e7c7d8241d49 100644
> --- a/arch/arm/mach-sunxi/Makefile
> +++ b/arch/arm/mach-sunxi/Makefile
> @@ -33,6 +33,7 @@ else
>  obj-$(CONFIG_MACH_SUN8I)       += clock_sun6i.o
>  endif
>  obj-$(CONFIG_MACH_SUN9I)       += clock_sun9i.o
> +obj-$(CONFIG_MACH_SUN9I)       += gtbus_sun9i.o

Append to clock_sun9i

>
>  obj-$(CONFIG_AXP152_POWER)     += pmic_bus.o
>  obj-$(CONFIG_AXP209_POWER)     += pmic_bus.o
> diff --git a/arch/arm/mach-sunxi/clock.c b/arch/arm/mach-sunxi/clock.c
> index 0b8fc94711c8..e6f53f91e63a 100644
> --- a/arch/arm/mach-sunxi/clock.c
> +++ b/arch/arm/mach-sunxi/clock.c
> @@ -13,16 +13,22 @@
>  #include <asm/arch/clock.h>
>  #include <asm/arch/gpio.h>
>  #include <asm/arch/prcm.h>
> +#include <asm/arch/gtbus.h>
>  #include <asm/arch/sys_proto.h>
>
>  __weak void clock_init_sec(void)
>  {
>  }
>
> +__weak void gtbus_init(void)
> +{
> +}
> +
>  int clock_init(void)
>  {
>  #ifdef CONFIG_SPL_BUILD
>         clock_init_safe();
> +       gtbus_init();

Usually I recommend __weak in generic cases, so please call for 9I machines.

thanks!
-- 
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.


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