[U-Boot] [PATCH v5 0/3] Allwinner V3s and Lichee Pi Zero support (w/o SPL)
Icenowy Zheng
icenowy at aosc.io
Sat Apr 8 07:30:11 UTC 2017
Allwinner V3s is a SoC with single-core Cortex-A7 and 64MiB DRAM co-packaged
in a eLQFP package, which is suitable for manual soldering.
This patchset adds basic support for it. SPL support is still missing, due
to some reworks on DRAM initialization code is needed.(the co-packaged DRAM
is DDR2, but the DRAM initialization code currently only support DDR3.)
Icenowy Zheng (3):
sunxi: add basic V3s support
sunxi: add DTSI file for V3s
sunxi: add support for Lichee Pi Zero
arch/arm/dts/Makefile | 5 +-
arch/arm/dts/sun8i-v3s-licheepi-zero.dts | 83 +++++++++
arch/arm/dts/sun8i-v3s.dtsi | 284 ++++++++++++++++++++++++++++++
arch/arm/include/asm/arch-sunxi/gpio.h | 1 +
arch/arm/mach-sunxi/board.c | 4 +
arch/arm/mach-sunxi/cpu_info.c | 2 +
board/sunxi/Kconfig | 15 +-
board/sunxi/MAINTAINERS | 5 +
configs/LicheePi_Zero_defconfig | 12 ++
include/configs/sun8i.h | 2 +
include/configs/sunxi-common.h | 29 ++-
include/dt-bindings/clock/sun8i-v3s-ccu.h | 107 +++++++++++
include/dt-bindings/reset/sun8i-v3s-ccu.h | 78 ++++++++
13 files changed, 622 insertions(+), 5 deletions(-)
create mode 100644 arch/arm/dts/sun8i-v3s-licheepi-zero.dts
create mode 100644 arch/arm/dts/sun8i-v3s.dtsi
create mode 100644 configs/LicheePi_Zero_defconfig
create mode 100644 include/dt-bindings/clock/sun8i-v3s-ccu.h
create mode 100644 include/dt-bindings/reset/sun8i-v3s-ccu.h
--
2.12.2
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