[U-Boot] [PATCH v4 13/19] arm: dts: Add dts and dtsi for Arria 10

[Dinh Nguyen]

On 04/05/2017 04:32 AM, Ley Foon Tan wrote:
> Device tree files for Arria 10
> 
> Signed-off-by: Tien Fong Chee <tien.fong.chee at intel.com>
> Signed-off-by: Ley Foon Tan <ley.foon.tan at intel.com>
> ---
>  arch/arm/dts/Makefile                              |   1 +
>  arch/arm/dts/socfpga_arria10.dtsi                  | 859 +++++++++++++++++++++
>  arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts       |  30 +
>  .../dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi   | 481 ++++++++++++
>  4 files changed, 1371 insertions(+)
>  create mode 100644 arch/arm/dts/socfpga_arria10.dtsi
>  create mode 100644 arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
>  create mode 100644 arch/arm/dts/socfpga_arria10_socdk_sdmmc_handoff.dtsi
> 
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 462c690..f0c464d 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -144,6 +144,7 @@ dtb-$(CONFIG_AM43XX) += am437x-gp-evm.dtb am437x-sk-evm.dtb	\
>  dtb-$(CONFIG_THUNDERX) += thunderx-88xx.dtb
>  
>  dtb-$(CONFIG_ARCH_SOCFPGA) +=				\
> +	socfpga_arria10_socdk_sdmmc.dtb			\
>  	socfpga_arria5_socdk.dtb			\
>  	socfpga_cyclone5_is1.dtb			\
>  	socfpga_cyclone5_mcvevk.dtb			\
> diff --git a/arch/arm/dts/socfpga_arria10.dtsi b/arch/arm/dts/socfpga_arria10.dtsi
> new file mode 100644
> index 0000000..52ab7fe
> --- /dev/null
> +++ b/arch/arm/dts/socfpga_arria10.dtsi
> @@ -0,0 +1,859 @@
> +/*
> + * Copyright (C) 2016-2017 Intel Corporation
> + *
> + * SPDX-License-Identifier:	GPL-2.0        X11
> + */
> +
> +#include "skeleton.dtsi"
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/reset/altr,rst-mgr-a10.h>
> +
> +/ {
> +	#address-cells = <1>;
> +	#size-cells = <1>;
> +
> +	aliases {
> +		ethernet0 = &gmac0;
> +		ethernet1 = &gmac1;
> +		ethernet2 = &gmac2;
> +		serial0 = &uart0;
> +		serial1 = &uart1;
> +		timer0 = &timer0;
> +		timer1 = &timer1;
> +		timer2 = &timer2;
> +		timer3 = &timer3;
> +		spi0 = &spi0;
> +		spi1 = &spi1;
> +	};
> +
> +	memory {
> +		name = "memory";
> +		device_type = "memory";
> +		reg = <0x0 0x40000000>; /* 1GB */
> +	};

This belongs in the board dts file. And again, please keep the original
copyright from where you copied this file from.


[snip]

> diff --git a/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts b/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
> new file mode 100644
> index 0000000..a4215ee
> --- /dev/null
> +++ b/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
> @@ -0,0 +1,30 @@
> +/*
> + * Copyright (C) 2016-2017 Intel Corporation
> + *
> + * SPDX-License-Identifier:	GPL-2.0        X11
> + */
> +
> +/dts-v1/;
> +#include "socfpga_arria10_socdk_sdmmc_handoff.dtsi"
> +
> +/ {
> +	chosen {
> +		bootargs = "console=ttyS0,115200";
> +	};
> +};
> +
> +&uart1 {
> +	u-boot,dm-pre-reloc;
> +	status = "okay";
> +};
> +
> +&mmc {
> +	u-boot,dm-pre-reloc;
> +	status = "okay";
> +	num-slots = <1>;
> +	cap-sd-highspeed;
> +	broken-cd;
> +	bus-width = <4>;
> +	altr,dw-mshc-ciu-div = <3>;
> +	altr,dw-mshc-sdr-timing = <0 3>;
> +};

I don't think "altr,dw-mshc-ciu-div" and "altr,dw-mshc-sdr-timing"
support has been added to U-Boot yet.

Dinh