[U-Boot] [Patch v2 3/3] armv8: ls1088aqds: Add support of LS1088AQDS
York Sun
york.sun at nxp.com
Tue Apr 11 20:59:12 UTC 2017
On 04/10/2017 09:19 AM, Ashish Kumar wrote:
> This patch add support of LS1088AQDS platform.
>
> The LS1088A QorIQTM Development System (QDS) is a
> high-performance computing, evaluation, and
> development platform that supports the LS1088A QorIQ Architecture
> processor.
>
> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha at nxp.com>
> Signed-off-by: Ashish Kumar <Ashish.Kumar at nxp.com>
> Signed-off-by: Shaohui Xie <Shaohui.Xie at nxp.com>
> ---
> v2:
> Fix indentaion in commit msg
>
> arch/arm/Kconfig | 11 +
> arch/arm/cpu/armv8/Kconfig | 2 +-
> arch/arm/dts/Makefile | 1 +
> arch/arm/dts/fsl-ls1088a-qds.dts | 70 ++++
> board/freescale/ls1088a/Kconfig | 16 +
> board/freescale/ls1088a/MAINTAINERS | 10 +-
> board/freescale/ls1088a/Makefile | 1 +
> board/freescale/ls1088a/ddr.c | 119 +-----
> board/freescale/ls1088a/ddr.h | 9 +-
> board/freescale/ls1088a/eth_ls1088aqds.c | 650 +++++++++++++++++++++++++++++++
> board/freescale/ls1088a/ls1088a.c | 106 ++++-
> board/freescale/ls1088a/ls1088a_qixis.h | 5 +
> configs/ls1088aqds_qspi_defconfig | 27 ++
> configs/ls1088ardb_qspi_defconfig | 6 -
> include/configs/ls1088a_common.h | 8 +-
> include/configs/ls1088aqds.h | 422 ++++++++++++++++++++
> 16 files changed, 1316 insertions(+), 147 deletions(-)
> create mode 100644 arch/arm/dts/fsl-ls1088a-qds.dts
> create mode 100644 board/freescale/ls1088a/eth_ls1088aqds.c
> create mode 100644 configs/ls1088aqds_qspi_defconfig
> create mode 100644 include/configs/ls1088aqds.h
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index a441cb3..a5a5927 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -883,6 +883,17 @@ config TARGET_LS2080A_SIMU
> development platform that supports the QorIQ LS2080A
> Layerscape Architecture processor.
>
> +config TARGET_LS1088AQDS
> + bool "Support ls1088aqds"
> + select ARCH_LS1088A
> + select ARM64
> + select ARMV8_MULTIENTRY
> + help
> + Support for NXP LS1088AQDS platform
> + The LS1088A Development System (QDS) is a high-performance
> + development platform that supports the QorIQ LS1088A
> + Layerscape Architecture processor.
> +
> config TARGET_LS2080AQDS
> bool "Support ls2080aqds"
> select ARCH_LS2080A
> diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig
> index 630bb78..b3565a5 100644
> --- a/arch/arm/cpu/armv8/Kconfig
> +++ b/arch/arm/cpu/armv8/Kconfig
> @@ -88,7 +88,7 @@ config PSCI_RESET
> depends on !ARCH_EXYNOS7 && !ARCH_BCM283X && !TARGET_LS2080A_EMU && \
> !TARGET_LS2080A_SIMU && !TARGET_LS2080AQDS && \
> !TARGET_LS2080ARDB && !TARGET_LS1012AQDS && \
> - !TARGET_LS1088ARDB && \
> + !TARGET_LS1088ARDB && !TARGET_LS1088AQDS && \
> !TARGET_LS1012ARDB && !TARGET_LS1012AFRDM && \
> !TARGET_LS1043ARDB && !TARGET_LS1043AQDS && \
> !TARGET_LS1046ARDB && !TARGET_LS1046AQDS && \
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 5ac8ea3..2ec5c12 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -164,6 +164,7 @@ dtb-$(CONFIG_LS102XA) += ls1021a-qds-duart.dtb \
> ls1021a-iot-duart.dtb
> dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \
> fsl-ls2080a-rdb.dtb \
> + fsl-ls1088a-qds.dtb \
> fsl-ls1088a-rdb.dtb
> dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \
> fsl-ls1043a-qds-lpuart.dtb \
> diff --git a/arch/arm/dts/fsl-ls1088a-qds.dts b/arch/arm/dts/fsl-ls1088a-qds.dts
> new file mode 100644
> index 0000000..9b7bef4
> --- /dev/null
> +++ b/arch/arm/dts/fsl-ls1088a-qds.dts
> @@ -0,0 +1,70 @@
> +/*
> + * NXP ls1088a QDS board device tree source
> + *
> + * Copyright 2017 NXP
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +/dts-v1/;
> +
> +#include "fsl-ls1088a.dtsi"
> +
> +/ {
> + model = "NXP Layerscape 1088a QDS Board";
> + compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
> + aliases {
> + spi0 = &qspi;
> + spi1 = &dspi;
> + };
> +};
> +
> +&dspi {
> + bus-num = <0>;
> + status = "okay";
> +
> + dflash0: n25q128a {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "spi-flash";
> + reg = <0>;
> + spi-max-frequency = <1000000>; /* input clock */
> + };
> +
> + dflash1: sst25wf040b {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "spi-flash";
> + spi-max-frequency = <3500000>;
> + reg = <1>;
> + };
> +
> + dflash2: en25s64 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "spi-flash";
> + spi-max-frequency = <3500000>;
> + reg = <2>;
> + };
> +};
> +
> +&qspi {
> + bus-num = <0>;
> + status = "okay";
> +
> + qflash0: s25fs512s at 0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "spi-flash";
> + spi-max-frequency = <50000000>;
> + reg = <0>;
> + };
> +
> + qflash1: s25fs512s at 1 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "spi-flash";
> + spi-max-frequency = <50000000>;
> + reg = <1>;
> + };
> +};
> diff --git a/board/freescale/ls1088a/Kconfig b/board/freescale/ls1088a/Kconfig
> index a4d8223..1ada661 100644
> --- a/board/freescale/ls1088a/Kconfig
> +++ b/board/freescale/ls1088a/Kconfig
> @@ -1,3 +1,19 @@
> +if TARGET_LS1088AQDS
> +
> +config SYS_BOARD
> + default "ls1088a"
> +
> +config SYS_VENDOR
> + default "freescale"
> +
> +config SYS_SOC
> + default "fsl-layerscape"
> +
> +config SYS_CONFIG_NAME
> + default "ls1088aqds"
> +
> +endif
> +
> if TARGET_LS1088ARDB
>
> config SYS_BOARD
> diff --git a/board/freescale/ls1088a/MAINTAINERS b/board/freescale/ls1088a/MAINTAINERS
> index 1abbf91..e1e6d4b 100644
> --- a/board/freescale/ls1088a/MAINTAINERS
> +++ b/board/freescale/ls1088a/MAINTAINERS
> @@ -5,5 +5,11 @@ S: Maintained
> F: board/freescale/ls1088a/
> F: include/configs/ls1088ardb.h
> F: configs/ls1088ardb_qspi_defconfig
> -F: configs/ls1088ardb_sdcard_defconfig
> -F: configs/ls1088ardb_sdcard_qspi_defconfig
These two lines shouldn't be added in previous patch.
> +
> +LS1088AQDS BOARD
> +M: Prabhakar Kushwaha <prabhakar.kushwaha at nxp.com>
> +M: Ashish Kumar <Ashish.Kumar at nxp.com>
> +S: Maintained
> +F: board/freescale/ls1088a/
> +F: include/configs/ls1088aqds.h
> +F: configs/ls1088aqds_qspi_defconfig
> diff --git a/board/freescale/ls1088a/Makefile b/board/freescale/ls1088a/Makefile
> index e997cf1..bdcce9e 100644
> --- a/board/freescale/ls1088a/Makefile
> +++ b/board/freescale/ls1088a/Makefile
> @@ -6,4 +6,5 @@
>
> obj-y += ls1088a.o
> obj-$(CONFIG_TARGET_LS1088ARDB) += eth_ls1088ardb.o
> +obj-$(CONFIG_TARGET_LS1088AQDS) += eth_ls1088aqds.o
> obj-y += ddr.o
> diff --git a/board/freescale/ls1088a/ddr.c b/board/freescale/ls1088a/ddr.c
> index 5b5a89f..872a178 100644
> --- a/board/freescale/ls1088a/ddr.c
> +++ b/board/freescale/ls1088a/ddr.c
> @@ -25,19 +25,14 @@ void fsl_ddr_board_options(memctl_options_t *popts,
> if (!pdimm->n_ranks)
> return;
>
> - /*
> - * we use identical timing for all slots. If needed, change the code
> - * to pbsp = rdimms[ctrl_num] or pbsp = udimms[ctrl_num];
> - */
> - pbsp = udimms[ctrl_num];
> + pbsp = udimms[0];
Please fix it in previous patch.
>
> /* Get clk_adjust, wrlvl_start, wrlvl_ctl, according to the board ddr
> * freqency and n_banks specified in board_specific_parameters table.
> */
> ddr_freq = get_ddr_freq(0) / 1000000;
> while (pbsp->datarate_mhz_high) {
> - if (pbsp->n_ranks == pdimm->n_ranks &&
> - (pdimm->rank_density >> 30) >= pbsp->rank_gb) {
> + if (pbsp->n_ranks == pdimm->n_ranks) {
> if (ddr_freq <= pbsp->datarate_mhz_high) {
> popts->clk_adjust = pbsp->clk_adjust;
> popts->wrlvl_start = pbsp->wrlvl_start;
> @@ -63,51 +58,18 @@ void fsl_ddr_board_options(memctl_options_t *popts,
> panic("DIMM is not supported by this board");
> }
> found:
> -#if defined(CONFIG_EMU)
Guess you don't really need emulator support. Please remove from
previous patch.
> debug("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n"
> "\tclk_adjust %d, wrlvl_start %d, wrlvl_ctrl_2 0x%x, wrlvl_ctrl_3 0x%x\n",
> pbsp->n_ranks, pbsp->datarate_mhz_high, pbsp->rank_gb,
> pbsp->clk_adjust, pbsp->wrlvl_start, pbsp->wrlvl_ctl_2,
> pbsp->wrlvl_ctl_3);
> -#else
> - debug("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n",
> - pbsp->n_ranks, pbsp->datarate_mhz_high, pbsp->rank_gb);
> -
> - pdimm[0].dq_mapping[0] = 0x15;
> - pdimm[0].dq_mapping[1] = 0x35;
> - pdimm[0].dq_mapping[2] = 0x0b;
> - pdimm[0].dq_mapping[3] = 0x2c;
> - pdimm[0].dq_mapping[4] = 0x15;
> - pdimm[0].dq_mapping[5] = 0x35;
> - pdimm[0].dq_mapping[6] = 0x15;
> - pdimm[0].dq_mapping[7] = 0x35;
> - pdimm[0].dq_mapping[8] = 0xc;
> - pdimm[0].dq_mapping[9] = 0;
> - pdimm[0].dq_mapping[10] = 0;
> - pdimm[0].dq_mapping[11] = 0;
> - pdimm[0].dq_mapping[12] = 0;
> - pdimm[0].dq_mapping[13] = 0;
> - pdimm[0].dq_mapping[14] = 0;
> - pdimm[0].dq_mapping[15] = 0;
> - pdimm[0].dq_mapping[16] = 0;
> - pdimm[0].dq_mapping[17] = 0;
> -
> - /* force DDR bus width to 32 bits */
> - popts->data_bus_width = 1;
> +
> + popts->data_bus_width = 0; /* 64b data bus */
> popts->otf_burst_chop_en = 0;
> popts->burst_length = DDR_BL8;
> - popts->bstopre = 0; /* enable auto precharge */
> -#endif
> + popts->bstopre = 0; /* enable auto precharge */
>
> - /*
> - * Factors to consider for half-strength driver enable:
> - * - number of DIMMs installed
> - */
> -#if defined(CONFIG_EMU)
> - popts->half_strength_driver_enable = 1;
> -#else
> popts->half_strength_driver_enable = 0;
> -#endif
> /*
> * Write leveling override
> */
> @@ -122,10 +84,10 @@ found:
> /* Enable ZQ calibration */
> popts->zq_en = 1;
>
> -#if defined(CONFIG_EMU)
> +#if defined(CONFIG_TARGET_LS1088AQDS)
> popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_80ohm);
> popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm) |
> - DDR_CDR2_VREF_OVRD(70); /* Vref = 70% */
> + DDR_CDR2_VREF_TRAIN_EN | DDR_CDR2_VREF_RANGE_2;
> #else
> popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_60ohm);
> popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_100ohm) |
> @@ -134,73 +96,6 @@ found:
> popts->cpo_sample = 0x6d;
> }
>
> -#ifdef CONFIG_SYS_DDR_RAW_TIMING
> -dimm_params_t ddr_raw_timing = {
> - .n_ranks = 1,
> - .rank_density = 4294967296u,
> - .capacity = 4294967296u,
> - .primary_sdram_width = 64,
> - .ec_sdram_width = 8,
> - .registered_dimm = 0,
> - .mirrored_dimm = 1,
> - .n_row_addr = 15,
> - .n_col_addr = 10,
> - .bank_addr_bits = 0,
> - .bank_group_bits = 2,
> - .edc_config = 2,
> - .burst_lengths_bitmask = 0x0c,
> -
> - .tckmin_x_ps = 938,
> - .tckmax_ps = 1500,
> - .caslat_x = 0x000DFA00,
> - .taa_ps = 13500,
> - .trcd_ps = 13500,
> - .trp_ps = 13500,
> - .tras_ps = 33000,
> - .trc_ps = 46500,
> - .trfc1_ps = 260000,
> - .trfc2_ps = 160000,
> - .trfc4_ps = 110000,
> - .tfaw_ps = 21000,
> - .trrds_ps = 3700,
> - .trrdl_ps = 5300,
> - .tccdl_ps = 5355,
> - .refresh_rate_ps = 7800000,
> - .dq_mapping[0] = 0x00,
> - .dq_mapping[1] = 0x00,
> - .dq_mapping[2] = 0x00,
> - .dq_mapping[3] = 0x00,
> - .dq_mapping[4] = 0x00,
> - .dq_mapping[5] = 0x00,
> - .dq_mapping[6] = 0x00,
> - .dq_mapping[7] = 0x00,
> - .dq_mapping[8] = 0x00,
> - .dq_mapping[9] = 0x00,
> - .dq_mapping[10] = 0x00,
> - .dq_mapping[11] = 0x00,
> - .dq_mapping[12] = 0x00,
> - .dq_mapping[13] = 0x00,
> - .dq_mapping[14] = 0x00,
> - .dq_mapping[15] = 0x00,
> - .dq_mapping[16] = 0x00,
> - .dq_mapping[17] = 0x00,
> - .dq_mapping_ors = 1,
> -};
> -
I am going to stop here. Please respin the patch set.
York
More information about the U-Boot
mailing list