[U-Boot] [PATCH 1/2] imx-common: Enable ACTLR.SMP bit for i.MX cortex-a7 platforms

[André Przywara]

On 13/04/17 07:27, Peng Fan wrote:

Hi,

>> -----Original Message-----
>> From: Stefano Babic [mailto:sbabic at denx.de]
>> Sent: Thursday, April 13, 2017 2:24 PM
>> To: Peng Fan <peng.fan at nxp.com>; Stefano Babic <sbabic at denx.de>
>> Cc: van.freenix at gmail.com; u-boot at lists.denx.de; andre.przywara at arm.com;
>> Albert ARIBAUD <albert.u.boot at aribaud.net>
>> Subject: Re: [PATCH 1/2] imx-common: Enable ACTLR.SMP bit for i.MX cortex-
>> a7 platforms
>>
>> Hi Peng,
>>
>> On 13/04/2017 05:05, Peng Fan wrote:
>>
>>>> Anyway, it looks to me wrong to fix this in i.MX code, as this must
>>>> be fixed for all Cortex-A7. It should be fixed in general ARM code.
>>>>
>>>> And Andre has already sent patches for this (at least for sunxi), but
>>>> with the opposite rule (default is set if not specific requested).
>>>
>>> Thanks for correcting me. I see Andre's patch
>>> https://lists.denx.de/pipermail/u-boot/2017-February/279918.html
>>>
>>> It only handles sunxi platform. If we need fix i.MX A7 cores, do you prefer I
>> set the SMP bit in s_init for i.MX6UL/7?
>>> Or you prefer this should be handled by common ARM code?
>>
>> As far as I understand, this issue is common to all A7 cores ==> fix should be in
>> common ARM code.

Well, it's not only common to all A7 cores, actually all ARMv7 SMP
Cortex cores (A5, A7, A9, A15, A17) need this. Cortex-A8 is UP only, so
does not have this bit. Sometimes this bit is set by other boot code
before U-Boot (hence not every board might need this).
ARMv8 Cortex cores have this bit as well, just in the CPUECTLR register.
So looking at arm64, I find (in arch/arm/cpu/armv8/Kconfig):
============
config ARMV8_SET_SMPEN
        bool "Enable data coherency with other cores in cluster"
        help
          Say Y here if there is not any trust firmware to set
          CPUECTLR_EL1.SMPEN bit before U-Boot.
....
============

So I'd suggest to piggy back on this, either by moving this Kconfig
option to some shared ARM code path, or by replicating this option to
some ARMv7 Kconfig file.

> Ok. Since there is no Cortex-A[x] revision check in U-Boot, need to first add the code.

Mmh, do you mean auto-detection during runtime? As in:
if (MIDR == CortexA7)
	set_smp_bit();

The problem with this is that U-Boot might not be able to access the
register (access to ACTLR from non-secure world can be forbidden by
secure world).

So I'd go with a Kconfig option. Boards or platforms that need it could
just select it.
We just need to find a nice place to put the code, maybe in
arch/arm/cpu/armv7/start.S.
And another problem is that is needs to be set on every core in the
system (like arch/arm/cpu/armv7/psci.S does already in psci_enable_smp).
So it cannot really work for systems without PSCI or those not bringing
all cores into U-Boot.

Cheers,
Andre.


> Then set ACTLR.SMP for A7 SMP.
> 
> Regards,
> Peng.
>