[U-Boot] [PATCH v4 12/19] fdt: Add compatible strings for Arria 10

[Simon Glass]

Hi,

On 5 April 2017 at 03:32, Ley Foon Tan <ley.foon.tan at intel.com> wrote:
> Add compatible strings for Intel Arria 10 SoCFPGA device.
>
> Signed-off-by: Tien Fong Chee <tien.fong.chee at intel.com>
> Signed-off-by: Ley Foon Tan <ley.foon.tan at intel.com>
> ---
>  include/fdtdec.h | 8 ++++++++
>  lib/fdtdec.c     | 8 ++++++++
>  2 files changed, 16 insertions(+)
>
> diff --git a/include/fdtdec.h b/include/fdtdec.h
> index d074478..2134701 100644
> --- a/include/fdtdec.h
> +++ b/include/fdtdec.h
> @@ -155,6 +155,14 @@ enum fdt_compat_id {
>         COMPAT_INTEL_BAYTRAIL_FSP_MDP,  /* Intel FSP memory-down params */
>         COMPAT_INTEL_IVYBRIDGE_FSP,     /* Intel Ivy Bridge FSP */
>         COMPAT_SUNXI_NAND,              /* SUNXI NAND controller */
> +       COMPAT_ALTERA_SOCFPGA_CLK,      /* SoCFPGA Clock initialization */
> +       COMPAT_ALTERA_SOCFPGA_PINCTRL_SINGLE,   /* SoCFPGA pinctrl-single */
> +       COMPAT_ALTERA_SOCFPGA_H2F_BRG,          /* SoCFPGA hps2fpga bridge */
> +       COMPAT_ALTERA_SOCFPGA_LWH2F_BRG,        /* SoCFPGA lwhps2fpga bridge */
> +       COMPAT_ALTERA_SOCFPGA_F2H_BRG,          /* SoCFPGA fpga2hps bridge */
> +       COMPAT_ALTERA_SOCFPGA_F2SDR0,           /* SoCFPGA fpga2SDRAM0 bridge */
> +       COMPAT_ALTERA_SOCFPGA_F2SDR1,           /* SoCFPGA fpga2SDRAM1 bridge */
> +       COMPAT_ALTERA_SOCFPGA_F2SDR2,           /* SoCFPGA fpga2SDRAM2 bridge */

You should not be adding strings here. Instead you should be creating
a driver-model driver and put the compatible strings in there.

See the comment at the top of the C file for details.

>
>         COMPAT_COUNT,
>  };
> diff --git a/lib/fdtdec.c b/lib/fdtdec.c
> index 1edfbf2..94372cc 100644
> --- a/lib/fdtdec.c
> +++ b/lib/fdtdec.c
> @@ -66,6 +66,14 @@ static const char * const compat_names[COMPAT_COUNT] = {
>         COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
>         COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
>         COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
> +       COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
> +       COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
> +       COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
> +       COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
> +       COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
> +       COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
> +       COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
> +       COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
>  };

Regards,
Simon