[U-Boot] [PATCH v3 3/7] rockchip: spi: rk_spi: select 198MHz input to the SPI module for the RK3399

[Philipp Tomsich]

To provide more (runtime) configuration points for the SPI data rate
at higher speeds (e.g. above 9MHz), we increase the module input rate
to 198MHz (from 99MHz) for the RK3399.

Signed-off-by: Philipp Tomsich <philipp.tomsich at theobroma-systems.com>

---

Changes in v3:
- increase the module input clock from 99MHz to 198MHz for the RK3399
  (added in version 3)

Changes in v2: None

 drivers/spi/rk_spi.c | 7 ++++---
 drivers/spi/rk_spi.h | 7 +++++++
 2 files changed, 11 insertions(+), 3 deletions(-)

diff --git a/drivers/spi/rk_spi.c b/drivers/spi/rk_spi.c
index 3e44f17..63cceef 100644
--- a/drivers/spi/rk_spi.c
+++ b/drivers/spi/rk_spi.c
@@ -208,10 +208,11 @@ static int rockchip_spi_probe(struct udevice *bus)
 	priv->max_freq = plat->frequency;
 
 	/*
-	 * Use 99 MHz as our clock since it divides nicely into 594 MHz which
-	 * is the assumed speed for CLK_GENERAL.
+	 * Use 99 MHz (198MHz on the RK3399) as our clock since it
+	 * divides nicely into 594 MHz which is the assumed speed for
+	 * CLK_GENERAL.
 	 */
-	ret = clk_set_rate(&priv->clk, 99000000);
+	ret = clk_set_rate(&priv->clk, ROCKCHIP_SPI_MOD_CLK);
 	if (ret < 0) {
 		debug("%s: Failed to set clock: %d\n", __func__, ret);
 		return ret;
diff --git a/drivers/spi/rk_spi.h b/drivers/spi/rk_spi.h
index f1ac812..ea262ed 100644
--- a/drivers/spi/rk_spi.h
+++ b/drivers/spi/rk_spi.h
@@ -119,6 +119,13 @@ enum {
 };
 
 #define ROCKCHIP_SPI_TIMEOUT_MS		1000
+
+#if defined(CONFIG_ROCKCHIP_RK3399)
+#define ROCKCHIP_SPI_MOD_CLK            198000000
+#define ROCKCHIP_SPI_MAX_RATE		50000000
+#else
+#define ROCKCHIP_SPI_MOD_CLK            99000000
 #define ROCKCHIP_SPI_MAX_RATE		48000000
+#endif
 
 #endif /* __RK_SPI_H */
-- 
1.9.1