[U-Boot] [PATCH v4 10/11] rockchip: dts: Add mipi dsi support for rk3399
Eric Gao
eric.gao at rock-chips.com
Thu Apr 20 04:45:58 UTC 2017
Add dts config for mipi display, include vop, mipi controller, panel, backlight
. And Enable rk808 for lcd_3v3 in another patch.
Signed-off-by: Eric Gao <eric.gao at rock-chips.com>
---
Changes in v4: None
Changes in v3: None
Changes in v2:
-Add dts config for mipi display.
arch/arm/dts/rk3399-evb.dts | 84 +++++++++++++++++++++++++++++++++++++++++++++
arch/arm/dts/rk3399.dtsi | 72 ++++++++++++++++++++++++++++++++++++++
2 files changed, 156 insertions(+)
diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index e1f867b..3d6f3ce 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -59,6 +59,15 @@
gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
};
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ status = "disabled";
+ };
+
+ panel:panel {
+ compatible = "simple-panel";
+ status = "disabled";
+ };
};
&emmc_phy {
@@ -141,6 +150,7 @@
status = "okay";
vcc12-supply = <&vcc3v3_sys>;
+
regulators {
vcc33_lcd: SWITCH_REG2 {
regulator-always-on;
@@ -151,6 +161,80 @@
};
};
+&backlight {
+ power-supply = <&vccsys>;
+ enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
+ brightness-levels = <
+ 0 1 2 3 4 5 6 7
+ 8 9 10 11 12 13 14 15
+ 16 17 18 19 20 21 22 23
+ 24 25 26 27 28 29 30 31
+ 32 33 34 35 36 37 38 39
+ 40 41 42 43 44 45 46 47
+ 48 49 50 51 52 53 54 55
+ 56 57 58 59 60 61 62 63
+ 64 65 66 67 68 69 70 71
+ 72 73 74 75 76 77 78 79
+ 80 81 82 83 84 85 86 87
+ 88 89 90 91 92 93 94 95
+ 96 97 98 99 100 101 102 103
+ 104 105 106 107 108 109 110 111
+ 112 113 114 115 116 117 118 119
+ 120 121 122 123 124 125 126 127
+ 128 129 130 131 132 133 134 135
+ 136 137 138 139 140 141 142 143
+ 144 145 146 147 148 149 150 151
+ 152 153 154 155 156 157 158 159
+ 160 161 162 163 164 165 166 167
+ 168 169 170 171 172 173 174 175
+ 176 177 178 179 180 181 182 183
+ 184 185 186 187 188 189 190 191
+ 192 193 194 195 196 197 198 199
+ 200 201 202 203 204 205 206 207
+ 208 209 210 211 212 213 214 215
+ 216 217 218 219 220 221 222 223
+ 224 225 226 227 228 229 230 231
+ 232 233 234 235 236 237 238 239
+ 240 241 242 243 244 245 246 247
+ 248 249 250 251 252 253 254 255>;
+ default-brightness-level = <200>;
+ pwms = <&pwm0 0 25000 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_pin>;
+ pwm-delay-us = <10000>;
+ status = "okay";
+ };
+
+&panel {
+ power-supply = <&vcc33_lcd>;
+ backlight = <&backlight>;
+ /*enable-gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>;*/
+ status = "okay";
+};
+
+&mipi_dsi {
+ status = "okay";
+ rockchip,panel = <&panel>;
+ display-timings {
+ timing0 {
+ bits-per-pixel = <24>;
+ clock-frequency = <160000000>;
+ hfront-porch = <120>;
+ hsync-len = <20>;
+ hback-porch = <21>;
+ hactive = <1200>;
+ vfront-porch = <21>;
+ vsync-len = <3>;
+ vback-porch = <18>;
+ vactive = <1920>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ de-active = <1>;
+ pixelclk-active = <0>;
+ };
+ };
+};
+
&pinctrl {
pmic {
pmic_int_l: pmic-int-l {
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index d94d780..9344a43 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -684,6 +684,78 @@
status = "disabled";
};
+ vopl: vop at ff8f0000 {
+ u-boot,dm-pre-reloc;
+ compatible = "rockchip,rk3399-vop-lit";
+ reg = <0x0 0xff8f0000 0x0 0x3efc>;
+ interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>;
+ clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+ resets = <&cru SRST_A_VOP1>, <&cru SRST_H_VOP1>, <&cru SRST_D_VOP1>;
+ reset-names = "axi", "ahb", "dclk";
+ status = "okay";
+ vopl_out: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ vopl_out_mipi: endpoint at 0 {
+ reg = <3>;
+ remote-endpoint = <&mipi_in_vopl>;
+ };
+ };
+ };
+
+ vopb: vop at ff900000 {
+ u-boot,dm-pre-reloc;
+ compatible = "rockchip,rk3399-vop-big";
+ reg = <0x0 0xff900000 0x0 0x3efc>;
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
+ #clock-cells = <0>;
+ clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+ resets = <&cru SRST_A_VOP0>, <&cru SRST_H_VOP0>, <&cru SRST_D_VOP0>;
+ reset-names = "axi", "ahb", "dclk";
+ /*power-domains = <&power RK3399_PD_VOPB>;*/
+ status = "okay";
+ vopb_out: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ vopb_out_mipi: endpoint at 0 {
+ reg = <3>;
+ remote-endpoint = <&mipi_in_vopb>;
+ };
+ };
+ };
+
+ mipi_dsi: mipi at ff960000 {
+ compatible = "rockchip,rk3399_mipi_dsi";
+ reg = <0x0 0xff960000 0x0 0x8000>;
+ interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru SCLK_MIPIDPHY_REF>, <&cru PCLK_MIPI_DSI0>,
+ <&cru SCLK_DPHY_TX0_CFG>;
+ clock-names = "ref", "pclk", "phy_cfg";
+ rockchip,grf = <&grf>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ mipi_in: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ mipi_in_vopb: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&vopb_out_mipi>;
+ };
+ mipi_in_vopl: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&vopl_out_mipi>;
+ };
+ };
+ };
+ };
+
pinctrl: pinctrl {
u-boot,dm-pre-reloc;
compatible = "rockchip,rk3399-pinctrl";
--
1.9.1
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