[U-Boot] [v2, 05/13] fix: phy: marvell: cp110: fix the KR/SFI line 4 selector

[igall at marvell.com]

From: Stefan Roese <sr at denx.de>

This patch fixes the following:
1. KR/SFI on lane #4 mux selector is 0x2 and not 0x1
2. Comment typo

Signed-off-by: Rabeeh Khoury <rabeeh at solid-run.com>
Signed-off-by: Stefan Roese <sr at denx.de>
Signed-off-by: Igal Liberman <igall at marvell.com>
---
 drivers/phy/marvell/comphy_cp110.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/phy/marvell/comphy_cp110.c b/drivers/phy/marvell/comphy_cp110.c
index 499aa68..e90a913 100644
--- a/drivers/phy/marvell/comphy_cp110.c
+++ b/drivers/phy/marvell/comphy_cp110.c
@@ -49,7 +49,7 @@ struct comphy_mux_data cp110_comphy_phy_mux_data[] = {
 	     {PHY_TYPE_SFI, 0x1}, {PHY_TYPE_XAUI1, 0x1},
 	     {PHY_TYPE_RXAUI1, 0x1}, {PHY_TYPE_SATA1, 0x4} } },
 	{7, {{PHY_TYPE_UNCONNECTED, 0x0}, {PHY_TYPE_SGMII0, 0x2}, /* Lane 4 */
-	     {PHY_TYPE_XAUI0, 0x1}, {PHY_TYPE_RXAUI0, 0x1}, {PHY_TYPE_SFI, 0x1},
+	     {PHY_TYPE_XAUI0, 0x1}, {PHY_TYPE_RXAUI0, 0x1}, {PHY_TYPE_SFI, 0x2},
 	     {PHY_TYPE_SGMII2, 0x1}, {PHY_TYPE_XAUI2, 0x1} } },
 	{6, {{PHY_TYPE_UNCONNECTED, 0x0}, {PHY_TYPE_XAUI1, 0x1}, /* Lane 5 */
 	     {PHY_TYPE_RXAUI1, 0x1}, {PHY_TYPE_SGMII3, 0x1},
@@ -1718,7 +1718,7 @@ int comphy_cp110_init(struct chip_serdes_phy_config *ptr_chip_cfg,
 		}
 		if (ret == 0) {
 			/*
-			 * If interface wans't initialiuzed, set the lane to
+			 * If interface wans't initialized, set the lane to
 			 * PHY_TYPE_UNCONNECTED state.
 			 */
 			ptr_comphy_map->type = PHY_TYPE_UNCONNECTED;
-- 
2.7.4