[U-Boot] [PATCH 2/7] rockchip: rk3368: Add pinctrl driver
Simon Glass
sjg at chromium.org
Sat Apr 29 00:26:05 UTC 2017
Hi Andy,
On 20 April 2017 at 20:31, Andy Yan <andy.yan at rock-chips.com> wrote:
>
> Add driver to support iomux setup for the most commonly
> used peripherals on rk3368.
>
> Signed-off-by: Andy Yan <andy.yan at rock-chips.com>
> ---
>
> arch/arm/include/asm/arch-rockchip/grf_rk3368.h | 443 ++++++++++++++++++++++++
> drivers/pinctrl/Kconfig | 9 +
> drivers/pinctrl/rockchip/Makefile | 1 +
> drivers/pinctrl/rockchip/pinctrl_rk3368.c | 243 +++++++++++++
> 4 files changed, 696 insertions(+)
> create mode 100644 arch/arm/include/asm/arch-rockchip/grf_rk3368.h
> create mode 100644 drivers/pinctrl/rockchip/pinctrl_rk3368.c
>
> diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3368.h b/arch/arm/include/asm/arch-rockchip/grf_rk3368.h
> new file mode 100644
> index 0000000..f37beb8
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-rockchip/grf_rk3368.h
> @@ -0,0 +1,443 @@
> +/* (C) Copyright 2016 Rockchip Electronics Co., Ltd
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +#ifndef _ASM_ARCH_GRF_RK3368_H
> +#define _ASM_ARCH_GRF_RK3368_H
> +
> +#include <common.h>
> +
> +#define GRF_BASE 0xff770000
> +#define PMU_GRF_BASE 0xff738000
These should come from the device tree, or syscon.
[...]
> diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3368.c b/drivers/pinctrl/rockchip/pinctrl_rk3368.c
> new file mode 100644
> index 0000000..c0e5a73
> --- /dev/null
> +++ b/drivers/pinctrl/rockchip/pinctrl_rk3368.c
> @@ -0,0 +1,243 @@
> +/*
> + * (C) Copyright 2017 Rockchip Electronics Co., Ltd
> + * Author: Andy Yan <andy.yan at rock-chips.com>
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +#include <common.h>
> +#include <dm.h>
> +#include <errno.h>
> +#include <syscon.h>
> +#include <asm/arch/clock.h>
> +#include <asm/arch/hardware.h>
> +#include <asm/arch/grf_rk3368.h>
> +#include <asm/arch/periph.h>
> +#include <asm/io.h>
Should go below syscon
> +#include <dm/pinctrl.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +struct rk3368_pinctrl_priv {
> + struct rk3368_grf *grf;
> + struct rk3368_pmu_grf *pmugrf;
> +};
> +
> +static void pinctrl_rk3368_pwm_config(struct rk3368_grf *grf, int pwm_id)
> +{
> + switch (pwm_id) {
> + case PERIPH_ID_PWM0:
> + break;
> + case PERIPH_ID_PWM1:
> + break;
> + case PERIPH_ID_PWM2:
> + break;
> + case PERIPH_ID_PWM3:
> + break;
> + default:
> + debug("pwm id = %d iomux error!\n", pwm_id);
> + break;
> + }
> +}
> +
> +static void pinctrl_rk3368_i2c_config(struct rk3368_grf *grf, int i2c_id)
> +{
> + switch (i2c_id) {
> + case PERIPH_ID_I2C0:
> + break;
> + case PERIPH_ID_I2C1:
> + break;
> + case PERIPH_ID_I2C2:
> + break;
> + case PERIPH_ID_I2C3:
> + break;
> + default:
> + debug("i2c id = %d iomux error!\n", i2c_id);
> + break;
> + }
> +}
> +
> +static void pinctrl_rk3368_lcdc_config(struct rk3368_grf *grf, int lcd_id)
These function doesn't seem to do anything?
> +{
> + switch (lcd_id) {
> + case PERIPH_ID_LCDC0:
> + break;
> + default:
> + debug("lcdc id = %d iomux error!\n", lcd_id);
> + break;
> + }
> +}
> +
Drop extra blank line, and below also
> +
> +static void pinctrl_rk3368_uart_config(struct rk3368_pinctrl_priv *priv,
> + int uart_id)
> +{
> + struct rk3368_grf *grf = priv->grf;
> + struct rk3368_pmu_grf *pmugrf = priv->pmugrf;
> +
> + switch (uart_id) {
> + case PERIPH_ID_UART2:
> + rk_clrsetreg(&grf->gpio2a_iomux,
> + GPIO2A6_MASK | GPIO2A5_MASK,
> + GPIO2A6_UART2_SIN << GPIO2A6_SHIFT |
> + GPIO2A5_UART2_SOUT << GPIO2A5_SHIFT);
> + break;
> + case PERIPH_ID_UART0:
> + break;
> + case PERIPH_ID_UART1:
> + break;
> + case PERIPH_ID_UART3:
> + break;
> + case PERIPH_ID_UART4:
> + rk_clrsetreg(&pmugrf->gpio0d_iomux,
> + GPIO0D0_MASK | GPIO0D1_MASK |
> + GPIO0D2_MASK | GPIO0D3_MASK,
> + GPIO0D0_GPIO << GPIO0D0_SHIFT |
> + GPIO0D1_GPIO << GPIO0D1_SHIFT |
> + GPIO0D2_UART4_SOUT << GPIO0D2_SHIFT |
> + GPIO0D3_UART4_SIN << GPIO0D3_SHIFT);
> + break;
> + default:
> + debug("uart id = %d iomux error!\n", uart_id);
> + break;
> + }
> +}
> +
> +static void pinctrl_rk3368_sdmmc_config(struct rk3368_grf *grf,
> + int mmc_id)
> +{
> + switch (mmc_id) {
> + case PERIPH_ID_EMMC:
> + break;
> + case PERIPH_ID_SDCARD:
> + break;
> + default:
> + debug("mmc id = %d iomux error!\n", mmc_id);
> + break;
> + }
> +}
> +
> +static int rk3368_pinctrl_request(struct udevice *dev, int func, int flags)
> +{
> + struct rk3368_pinctrl_priv *priv = dev_get_priv(dev);
> +
> + debug("%s: func=%x, flags=%x\n", __func__, func, flags);
> + switch (func) {
> + case PERIPH_ID_PWM0:
> + case PERIPH_ID_PWM1:
> + case PERIPH_ID_PWM2:
> + case PERIPH_ID_PWM3:
> + pinctrl_rk3368_pwm_config(priv->grf, func);
> + break;
> + case PERIPH_ID_I2C0:
> + case PERIPH_ID_I2C1:
> + case PERIPH_ID_I2C2:
> + case PERIPH_ID_I2C3:
> + pinctrl_rk3368_i2c_config(priv->grf, func);
> + break;
> + case PERIPH_ID_UART0:
> + case PERIPH_ID_UART1:
> + case PERIPH_ID_UART2:
> + case PERIPH_ID_UART3:
> + case PERIPH_ID_UART4:
> + pinctrl_rk3368_uart_config(priv, func);
> + break;
> + case PERIPH_ID_LCDC0:
> + case PERIPH_ID_LCDC1:
> + pinctrl_rk3368_lcdc_config(priv->grf, func);
> + break;
> + case PERIPH_ID_SDMMC0:
> + case PERIPH_ID_SDMMC1:
> + pinctrl_rk3368_sdmmc_config(priv->grf, func);
> + break;
> + default:
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> +static int rk3368_pinctrl_get_periph_id(struct udevice *dev,
> + struct udevice *periph)
> +{
> + u32 cell[3];
> + int ret;
> +
> + ret = fdtdec_get_int_array(gd->fdt_blob, periph->of_offset,
> + "interrupts", cell, ARRAY_SIZE(cell));
> + if (ret < 0)
> + return -EINVAL;
> +
> + switch (cell[1]) {
> + case 59:
> + return PERIPH_ID_UART4;
> + case 58:
> + return PERIPH_ID_UART3;
> + case 57:
> + return PERIPH_ID_UART2;
> + case 56:
> + return PERIPH_ID_UART1;
> + case 55:
> + return PERIPH_ID_UART0;
> + case 50:
> + return PERIPH_ID_PWM0;
> + case 36:
> + return PERIPH_ID_I2C0;
> + case 37: /* Note strange order */
> + return PERIPH_ID_I2C1;
> + case 38:
> + return PERIPH_ID_I2C2;
> + case 39:
> + return PERIPH_ID_I2C3;
> + case 12:
> + return PERIPH_ID_SDCARD;
> + case 14:
> + return PERIPH_ID_EMMC;
> + }
> +
> + return -ENOENT;
> +}
> +
> +static int rk3368_pinctrl_set_state_simple(struct udevice *dev,
> + struct udevice *periph)
> +{
> + int func;
> +
> + func = rk3368_pinctrl_get_periph_id(dev, periph);
> + if (func < 0)
> + return func;
> +
> + return rk3368_pinctrl_request(dev, func, 0);
> +}
> +
> +static struct pinctrl_ops rk3368_pinctrl_ops = {
> + .set_state_simple = rk3368_pinctrl_set_state_simple,
> + .request = rk3368_pinctrl_request,
> + .get_periph_id = rk3368_pinctrl_get_periph_id,
> +};
> +
> +static int rk3368_pinctrl_probe(struct udevice *dev)
> +{
> + struct rk3368_pinctrl_priv *priv = dev_get_priv(dev);
> + int ret = 0;
> +
> + priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
> + priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
> +
> + debug("%s: grf=%p pmugrf:%p\n", __func__, priv->grf, priv->pmugrf);
> +
> + return ret;
> +}
> +
> +static const struct udevice_id rk3368_pinctrl_ids[] = {
> + { .compatible = "rockchip,rk3368-pinctrl" },
> + { }
> +};
> +
> +U_BOOT_DRIVER(pinctrl_rk3368) = {
> + .name = "rockchip_rk3368_pinctrl",
> + .id = UCLASS_PINCTRL,
> + .of_match = rk3368_pinctrl_ids,
> + .priv_auto_alloc_size = sizeof(struct rk3368_pinctrl_priv),
> + .ops = &rk3368_pinctrl_ops,
> + .bind = dm_scan_fdt_dev,
> + .probe = rk3368_pinctrl_probe,
> +};
> --
> 2.7.4
>
>
Regards,
Simon
More information about the U-Boot
mailing list