[U-Boot] [PATCH v4 45/66] rockchip: clk: rk3368: add support for GMAC (SLCK_MAC) clock

[Philipp Tomsich]

To enable the GMAC on the RK3368, we need to set up the clocking
appropriately to generate a tx_clk for the MAC.

This adds an implementation that implements the use of the <&ext_gmac>
clock (i.e. an external 125MHz clock for RGMII provided by the PHY).
This is the clock setup used by the boards currently supported by
U-Boot (i.e. Geekbox, Sheep and RK3368-uQ7).

This includes the change from commit
 - rockchip: clk: rk3368: define GMAC_MUX_SEL_EXTCLK

Signed-off-by: Philipp Tomsich <philipp.tomsich at theobroma-systems.com>

Reviewed-by: Simon Glass <sjg at chromium.org>
---

Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/include/asm/arch-rockchip/cru_rk3368.h |  3 +++
 drivers/clk/rockchip/clk_rk3368.c               | 19 +++++++++++++++++--
 2 files changed, 20 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
index 21f11e0..2b1197f 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
@@ -89,6 +89,9 @@ enum {
 	MCU_CLK_DIV_SHIFT		= 0,
 	MCU_CLK_DIV_MASK		= GENMASK(4, 0),
 
+	/* CLKSEL43_CON */
+	GMAC_MUX_SEL_EXTCLK             = BIT(8),
+
 	/* CLKSEL51_CON */
 	MMC_PLL_SEL_SHIFT		= 8,
 	MMC_PLL_SEL_MASK		= GENMASK(9, 8),
diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index 1bed4e2..2b6c8da 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -338,6 +338,19 @@ static ulong rk3368_ddr_set_clk(struct rk3368_cru *cru, ulong set_rate)
 }
 #endif
 
+#if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
+static ulong rk3368_gmac_set_clk(struct rk3368_cru *cru,
+				 ulong clk_id, ulong set_rate)
+{
+	/*
+	 * This models the 'assigned-clock-parents = <&ext_gmac>' from
+	 * the DTS and switches to the 'ext_gmac' clock parent.
+	 */
+	rk_setreg(&cru->clksel_con[43], GMAC_MUX_SEL_EXTCLK);
+	return set_rate;
+}
+#endif
+
 static ulong rk3368_clk_set_rate(struct clk *clk, ulong rate)
 {
 	struct rk3368_clk_priv *priv = dev_get_priv(clk->dev);
@@ -356,10 +369,12 @@ static ulong rk3368_clk_set_rate(struct clk *clk, ulong rate)
 		ret = rk3368_mmc_set_clk(clk, rate);
 		break;
 #endif
+#if CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
 	case SCLK_MAC:
-		/* nothing to do, as this is an external clock */
-		ret = rate;
+		/* select the external clock */
+		ret = rk3368_gmac_set_clk(priv->cru, clk->id, rate);
 		break;
+#endif
 	default:
 		return -ENOENT;
 	}
-- 
2.1.4