[U-Boot] [PATCH v4 33/66] rockchip: rk3368: dts: add sgrf node

Philipp Tomsich philipp.tomsich at theobroma-systems.com
Wed Aug 2 20:34:28 UTC 2017

We will to drop device security temporarily (until the ATF initialises
it fully) from the TPL/SPL stage: this requires access to some
registers in the SGRF.

This adds the sgrf node to the rk3368.dtsi, so we can then bind a
syscon device onto it and access its memory ranges.

Signed-off-by: Philipp Tomsich <philipp.tomsich at theobroma-systems.com>
Reviewed-by: Simon Glass <sjg at chromium.org>

Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/dts/rk3368.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/dts/rk3368.dtsi b/arch/arm/dts/rk3368.dtsi
index 9daf765..59c20da 100644
--- a/arch/arm/dts/rk3368.dtsi
+++ b/arch/arm/dts/rk3368.dtsi
@@ -652,6 +652,11 @@
 		reg = <0x0 0xff738000 0x0 0x1000>;
+	sgrf: syscon at ff740000 {
+	        compatible = "rockchip,rk3368-sgrf", "syscon";
+		reg = <0x0 0xff740000 0x0 0x1000>;
+	};
 	cru: clock-controller at ff760000 {
 		compatible = "rockchip,rk3368-cru";
 		reg = <0x0 0xff760000 0x0 0x1000>;

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