[U-Boot] [PATCH] m68k: add board stmark2, mcf5441x based
christophe leroy
christophe.leroy at c-s.fr
Sat Aug 5 12:58:51 UTC 2017
Le 14/07/2017 à 23:45, Angelo Dureghello a écrit :
> Signed-off-by: Angelo Dureghello <angelo at sysam.it>
> ---
> arch/m68k/Kconfig | 5 +
> board/sysam/stmark2/Kconfig | 15 +++
> board/sysam/stmark2/MAINTAINERS | 6 ++
> board/sysam/stmark2/Makefile | 8 ++
> board/sysam/stmark2/sbf_dram_init.S | 119 +++++++++++++++++++++
> board/sysam/stmark2/stmark2.c | 47 +++++++++
> configs/stmark2_defconfig | 26 +++++
> include/configs/stmark2.h | 202 ++++++++++++++++++++++++++++++++++++
> scripts/config_whitelist.txt | 1 +
> 9 files changed, 429 insertions(+)
> create mode 100644 board/sysam/stmark2/Kconfig
> create mode 100644 board/sysam/stmark2/MAINTAINERS
> create mode 100644 board/sysam/stmark2/Makefile
> create mode 100644 board/sysam/stmark2/sbf_dram_init.S
> create mode 100644 board/sysam/stmark2/stmark2.c
> create mode 100644 configs/stmark2_defconfig
> create mode 100644 include/configs/stmark2.h
>
[...]
> diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h
> new file mode 100644
> index 0000000000..bd1f64bc8f
> --- /dev/null
> +++ b/include/configs/stmark2.h
> @@ -0,0 +1,202 @@
> +/*
> + * Sysam stmark2 board configuration
> + *
> + * (C) Copyright 2016 Angelo Dureghello <angelo at sysam.it>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#ifndef __STMARK2_CONFIG_H
> +#define __STMARK2_CONFIG_H
> +
> +#define CONFIG_STMARK2
> +#define CONFIG_HOSTNAME stmark2
> +
> +#define CONFIG_MCFUART
> +#define CONFIG_SYS_UART_PORT 0
> +#define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
> +
> +#define LDS_BOARD_TEXT \
> + board/sysam/stmark2/sbf_dram_init.o (.text*)
> +
> +#define CONFIG_TIMESTAMP
> +
> +/* commands */
> +#define CONFIG_CMD_REGINFO
CMD_REGINFO is only on PowerPC 8xx, 85xx and 86xx
Christophe
> +
> +#define CONFIG_BOOTARGS \
> + "console=ttyS0,115200 root=/dev/ram0 rw " \
> + "rootfstype=ramfs " \
> + "rdinit=/bin/init " \
> + "devtmpfs.mount=1"
> +
> +#define CONFIG_BOOTCOMMAND \
> + "sf probe 0:1 50000000; " \
> + "sf read ${loadaddr} 0x100000 ${kern_size}; " \
> + "bootm ${loadaddr}"
> +
> +#define CONFIG_EXTRA_ENV_SETTINGS \
> + "kern_size=0x700000\0" \
> + "loadaddr=0x40001000\0" \
> + "-(rootfs)\0" \
> + "update_uboot=loady ${loadaddr}; " \
> + "sf probe 0:1 50000000; " \
> + "sf erase 0 0x80000; " \
> + "sf write ${loadaddr} 0 ${filesize}\0" \
> + "update_kernel=loady ${loadaddr}; " \
> + "setenv kern_size ${filesize}; saveenv; " \
> + "sf probe 0:1 50000000; " \
> + "sf erase 0x100000 0x700000; " \
> + "sf write ${loadaddr} 0x100000 ${filesize}\0" \
> + "update_rootfs=loady ${loadaddr}; " \
> + "sf probe 0:1 50000000; " \
> + "sf erase 0x00800000 0x100000; " \
> + "sf write ${loadaddr} 0x00800000 ${filesize}\0" \
> + ""
> +
> +/* Realtime clock */
> +#undef CONFIG_MCFRTC
> +#define CONFIG_RTC_MCFRRTC
> +#define CONFIG_SYS_MCFRRTC_BASE 0xFC0A8000
> +
> +/* spi not partitions */
> +#define CONFIG_CMD_MTDPARTS
> +#define CONFIG_MTD_DEVICE
> +#define CONFIG_JFFS2_CMDLINE
> +#define CONFIG_JFFS2_DEV "nor0"
> +#define MTDIDS_DEFAULT "nor0=spi-flash.0"
> +#define MTDPARTS_DEFAULT \
> + "mtdparts=spi-flash.0:" \
> + "1m(u-boot)," \
> + "7m(kernel)," \
> + "-(rootfs)"
> +
> +/* Timer */
> +#define CONFIG_MCFTMR
> +#undef CONFIG_MCFPIT
> +
> +/* DSPI and Serial Flash */
> +#define CONFIG_CF_SPI
> +#define CONFIG_CF_DSPI
> +#define CONFIG_SF_DEFAULT_SPEED 50000000
> +#define CONFIG_SERIAL_FLASH
> +#define CONFIG_HARD_SPI
> +#define CONFIG_SPI_FLASH_ISSI
> +#define CONFIG_ENV_SPI_BUS 0
> +#define CONFIG_ENV_SPI_CS 1
> +
> +#define CONFIG_SYS_SBFHDR_SIZE 0x7
> +
> +#define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \
> + DSPI_CTAR_PCSSCK_1CLK | \
> + DSPI_CTAR_PASC(0) | \
> + DSPI_CTAR_PDT(0) | \
> + DSPI_CTAR_CSSCK(0) | \
> + DSPI_CTAR_ASC(0) | \
> + DSPI_CTAR_DT(1) | \
> + DSPI_CTAR_BR(6))
> +#define CONFIG_SYS_DSPI_CTAR1 (CONFIG_SYS_DSPI_CTAR0)
> +#define CONFIG_SYS_DSPI_CTAR2 (CONFIG_SYS_DSPI_CTAR0)
> +
> +/* Input, PCI, Flexbus, and VCO */
> +#define CONFIG_EXTRA_CLOCK
> +
> +#define CONFIG_PRAM 2048 /* 2048 KB */
> +#define CONFIG_SYS_LONGHELP
> +#define CONFIG_AUTO_COMPLETE
> +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
> +
> +/* Print Buffer Size */
> +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
> + sizeof(CONFIG_SYS_PROMPT) + 16)
> +#define CONFIG_SYS_MAXARGS 16
> +/* Boot Argument Buffer Size */
> +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
> +
> +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000)
> +#define CONFIG_SYS_MBAR 0xFC000000
> +
> +/*
> + * Definitions for initial stack pointer and data area (in internal SRAM)
> + */
> +#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
> +/* End of used area in internal SRAM */
> +#define CONFIG_SYS_INIT_RAM_SIZE 0x10000
> +#define CONFIG_SYS_INIT_RAM_CTRL 0x221
> +#define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - \
> + GENERATED_GBL_DATA_SIZE) - 32)
> +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
> +#define CONFIG_SYS_SBFHDR_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - 32)
> +
> +/*
> + * Start addresses for the final memory configuration
> + * (Set up by the startup code)
> + * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
> + */
> +#define CONFIG_SYS_SDRAM_BASE 0x40000000
> +#define CONFIG_SYS_SDRAM_SIZE 128 /* SDRAM size in MB */
> +
> +#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x400)
> +#define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
> +#define CONFIG_SYS_DRAM_TEST
> +
> +#if defined(CONFIG_CF_SBF)
> +#define CONFIG_SERIAL_BOOT
> +#endif
> +
> +#if defined(CONFIG_SERIAL_BOOT)
> +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400)
> +#else
> +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
> +#endif
> +
> +#define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024)
> +/* Reserve 256 kB for Monitor */
> +#define CONFIG_SYS_MONITOR_LEN (256 << 10)
> +/* Reserve 256 kB for malloc() */
> +#define CONFIG_SYS_MALLOC_LEN (256 << 10)
> +
> +/*
> + * For booting Linux, the board info and command line data
> + * have to be in the first 8 MB of memory, since this is
> + * the maximum mapped by the Linux kernel during initialization ??
> + */
> +/* Initial Memory map for Linux */
> +#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \
> + (CONFIG_SYS_SDRAM_SIZE << 20))
> +
> +/* Configuration for environment
> + * Environment is embedded in u-boot in the second sector of the flash
> + */
> +
> +#if defined(CONFIG_CF_SBF)
> +#define CONFIG_ENV_IS_IN_SPI_FLASH 1
> +#define CONFIG_ENV_SPI_CS 1
> +#define CONFIG_ENV_OFFSET 0x40000
> +#define CONFIG_ENV_SIZE 0x2000
> +#define CONFIG_ENV_SECT_SIZE 0x10000
> +#endif
> +
> +#undef CONFIG_ENV_OVERWRITE
> +
> +/* Cache Configuration */
> +#define CONFIG_SYS_CACHELINE_SIZE 16
> +#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
> + CONFIG_SYS_INIT_RAM_SIZE - 8)
> +#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
> + CONFIG_SYS_INIT_RAM_SIZE - 4)
> +#define CONFIG_SYS_ICACHE_INV (CF_CACR_BCINVA + CF_CACR_ICINVA)
> +#define CONFIG_SYS_DCACHE_INV (CF_CACR_DCINVA)
> +#define CONFIG_SYS_CACHE_ACR2 (CONFIG_SYS_SDRAM_BASE | \
> + CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
> + CF_ACR_EN | CF_ACR_SM_ALL)
> +#define CONFIG_SYS_CACHE_ICACR (CF_CACR_BEC | CF_CACR_IEC | \
> + CF_CACR_ICINVA | CF_CACR_EUSP)
> +#define CONFIG_SYS_CACHE_DCACR ((CONFIG_SYS_CACHE_ICACR | \
> + CF_CACR_DEC | CF_CACR_DDCM_P | \
> + CF_CACR_DCINVA) & ~CF_CACR_ICINVA)
> +
> +#define CACR_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
> + CONFIG_SYS_INIT_RAM_SIZE - 12)
> +
> +#endif /* __STMARK2_CONFIG_H */
> diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
> index e8f49ebe5d..e6faf3450e 100644
> --- a/scripts/config_whitelist.txt
> +++ b/scripts/config_whitelist.txt
> @@ -2696,6 +2696,7 @@ CONFIG_STM32_GPIO
> CONFIG_STM32_HSE_HZ
> CONFIG_STM32_HZ
> CONFIG_STM32_SERIAL
> +CONFIG_STMARK2
> CONFIG_STRESS
> CONFIG_STRIDER
> CONFIG_STRIDER_CON
>
---
L'absence de virus dans ce courrier électronique a été vérifiée par le logiciel antivirus Avast.
https://www.avast.com/antivirus
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