[U-Boot] [PATCH] rockchip: clk: rk3399: fix SPI clock code for SPI3

Dr. Philipp Tomsich philipp.tomsich at theobroma-systems.com
Sun Aug 6 12:31:18 UTC 2017


> On 06 Aug 2017, at 07:15, Simon Glass <sjg at chromium.org> wrote:
> 
> On 26 July 2017 at 04:28, Philipp Tomsich
> <philipp.tomsich at theobroma-systems.com> wrote:
>> On the RK3399, SPI3 is special (it's configured via PMUGRF). The
>> implementation of the clock-setup for SPI3 was never supported (and
>> the comments reflected this), but the implementation did not correctly
>> handle this.
>> 
>> This fixes the code to match the comments above it and returns an
>> error when trying to configure SPI3.
>> 
>> Signed-off-by: Philipp Tomsich <philipp.tomsich at theobroma-systems.com>
>> ---
>> 
>> drivers/clk/rockchip/clk_rk3399.c | 18 ++++++++++++++----
>> 1 file changed, 14 insertions(+), 4 deletions(-)
> 
> Reviewed-by: Simon Glass <sjg at chromium.org>
> 
> Although I think debug() is better than error() in drivers.

Just for the record: I already marked this as rejected, as the original
code was correct (even though misleading).  The underlying issue
is that (SCLK_SPI4 - SCLK_SPI0) evaluates to 3 (and the SPI3 clock
is named SCLK_SPI3_PMU.

I’ll be submitting a replacement patch that clarifies the situation.

—Phil.



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