[U-Boot] [PATCH 4/8] armv8: Add workaround for USB erratum A-009007

[York Sun]

On 07/09/2017 07:41 PM, Ran Wang wrote:
> Rx Compliance tests may fail intermittently at high
> jitter frequencies using default register values.
> 
> Changes identified in setup makes the Rx compliance test pass.
> 
> Signed-off-by: Sriram Dash <sriram.dash at nxp.com>
> Signed-off-by: Rajesh Bhagat <rajesh.bhagat at nxp.com>
> Signed-off-by: Suresh Gupta <suresh.bhagat at nxp.com>
> Signed-off-by: Ran Wang <ran.wang_1 at nxp.com>
> ---
>   arch/arm/cpu/armv8/fsl-layerscape/Kconfig          | 12 ++++-
>   arch/arm/cpu/armv8/fsl-layerscape/soc.c            | 55 ++++++++++++++++++++++
>   .../include/asm/arch-fsl-layerscape/immap_lsch2.h  |  8 ++++
>   .../include/asm/arch-fsl-layerscape/immap_lsch3.h  |  9 ++++
>   4 files changed, 83 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> index 867794d..3f63694 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> @@ -25,6 +25,7 @@ config ARCH_LS1043A
>   	select SYS_FSL_ERRATUM_A009008
>   	select SYS_FSL_ERRATUM_A009798
>   	select SYS_FSL_ERRATUM_A008997
> +	select SYS_FSL_ERRATUM_A009007
>   	select SYS_FSL_HAS_DDR3
>   	select SYS_FSL_HAS_DDR4
>   	select ARCH_EARLY_INIT_R
> @@ -48,6 +49,7 @@ config ARCH_LS1046A
>   	select SYS_FSL_ERRATUM_A009008
>   	select SYS_FSL_ERRATUM_A009798
>   	select SYS_FSL_ERRATUM_A008997
> +	select SYS_FSL_ERRATUM_A009007
>   	select SYS_FSL_HAS_DDR4
>   	select SYS_FSL_SRDS_2
>   	select ARCH_EARLY_INIT_R
> @@ -86,6 +88,7 @@ config ARCH_LS2080A
>   	select SYS_FSL_ERRATUM_A009008
>   	select SYS_FSL_ERRATUM_A009798
>   	select SYS_FSL_ERRATUM_A008997
> +	select SYS_FSL_ERRATUM_A009007
>   	select ARCH_EARLY_INIT_R
>   	select BOARD_EARLY_INIT_F
>   
> @@ -236,7 +239,14 @@ config SYS_FSL_ERRATUM_A009798
>   	bool "Workaround for USB PHY erratum A009798"
>   
>   config SYS_FSL_ERRATUM_A008997
> -	bool "Workaround for USB PHY erratum A008997"
> +	bool
> +	help
> +		Workaround for USB PHY erratum A008997
> +
> +config SYS_FSL_ERRATUM_A009007
> +	bool
> +	help
> +		Workaround for USB PHY erratum A009007
>   
>   config MAX_CPUS
>   	int "Maximum number of CPUs permitted for Layerscape"
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> index 7ebb8d4..5810f42 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> @@ -115,6 +115,59 @@ static void erratum_a008997(void)
>   #endif /* CONFIG_SYS_FSL_ERRATUM_A008997 */
>   }
>   
> +static void erratum_a009007(void)
> +{
> +#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
> +	void __iomem *usb_phy = (void __iomem *)USB_PHY1;

Put a blank line here.

> +	out_be16(usb_phy + USB_PHY_RX_OVRD_IN_HI,
> +		 USB_PHY_RX_EQ_VAL_1);
> +	out_be16(usb_phy + USB_PHY_RX_OVRD_IN_HI,
> +		 USB_PHY_RX_EQ_VAL_2);
> +	out_be16(usb_phy + USB_PHY_RX_OVRD_IN_HI,
> +		 USB_PHY_RX_EQ_VAL_3);
> +	out_be16(usb_phy + USB_PHY_RX_OVRD_IN_HI,
> +		 USB_PHY_RX_EQ_VAL_4);
> +
> +	usb_phy = (void __iomem *)USB_PHY2;
> +	out_be16(usb_phy + USB_PHY_RX_OVRD_IN_HI,
> +		 USB_PHY_RX_EQ_VAL_1);
> +	out_be16(usb_phy + USB_PHY_RX_OVRD_IN_HI,
> +		 USB_PHY_RX_EQ_VAL_2);
> +	out_be16(usb_phy + USB_PHY_RX_OVRD_IN_HI,
> +		 USB_PHY_RX_EQ_VAL_3);
> +	out_be16(usb_phy + USB_PHY_RX_OVRD_IN_HI,
> +		 USB_PHY_RX_EQ_VAL_4);
> +
> +	usb_phy = (void __iomem *)USB_PHY3;
> +	out_be16(usb_phy + USB_PHY_RX_OVRD_IN_HI,
> +		 USB_PHY_RX_EQ_VAL_1);
> +	out_be16(usb_phy + USB_PHY_RX_OVRD_IN_HI,
> +		 USB_PHY_RX_EQ_VAL_2);
> +	out_be16(usb_phy + USB_PHY_RX_OVRD_IN_HI,
> +		 USB_PHY_RX_EQ_VAL_3);
> +	out_be16(usb_phy + USB_PHY_RX_OVRD_IN_HI,
> +		 USB_PHY_RX_EQ_VAL_4);
> +#elif defined(CONFIG_ARCH_LS2080A)
> +	void __iomem *dcsr = (void __iomem *)DCSR_BASE;
> +	out_le16(dcsr + DCSR_USB_PHY1 + DCSR_USB_PHY_RX_OVRD_IN_HI,
> +		 USB_PHY_RX_EQ_VAL_1);
> +	out_le16(dcsr + DCSR_USB_PHY1 + DCSR_USB_PHY_RX_OVRD_IN_HI,
> +		 USB_PHY_RX_EQ_VAL_2);
> +	out_le16(dcsr + DCSR_USB_PHY1 + DCSR_USB_PHY_RX_OVRD_IN_HI,
> +		 USB_PHY_RX_EQ_VAL_3);
> +	out_le16(dcsr + DCSR_USB_PHY1 + DCSR_USB_PHY_RX_OVRD_IN_HI,
> +		 USB_PHY_RX_EQ_VAL_4);
> +	out_le16(dcsr + DCSR_USB_PHY2 + DCSR_USB_PHY_RX_OVRD_IN_HI,
> +		 USB_PHY_RX_EQ_VAL_1);
> +	out_le16(dcsr + DCSR_USB_PHY2 + DCSR_USB_PHY_RX_OVRD_IN_HI,
> +		 USB_PHY_RX_EQ_VAL_2);
> +	out_le16(dcsr + DCSR_USB_PHY2 + DCSR_USB_PHY_RX_OVRD_IN_HI,
> +		 USB_PHY_RX_EQ_VAL_3);
> +	out_le16(dcsr + DCSR_USB_PHY2 + DCSR_USB_PHY_RX_OVRD_IN_HI,
> +		 USB_PHY_RX_EQ_VAL_4);
> +#endif /* CONFIG_SYS_FSL_ERRATUM_A009007 */

Something for you to consider. Use loop instead of repeating codes. 
Reuse code instead of repeat them under different macros.

The benefit of using loop is not much in this change. So you may 
consider to create a macro to run for each USB. At least it makes the 
code easier to read and maintain.

York