[U-Boot] [PATCH 2/3] arm: Implement workaround for Cortex-A9 errata 845369

Stefano Babic sbabic at denx.de
Tue Aug 8 09:00:28 UTC 2017


On 08/08/2017 07:34, Peng Fan wrote:
> Under very rare timing circumstances, transitioning into streaming
> mode might create a data corruption. Present on Two or more processors
> or 1 core with ACP, all revisions. This erratum can be worked round
> by setting bit[22] of the undocumented Diagnostic Control Register to 1.
> 
> Signed-off-by: Peng Fan <peng.fan at nxp.com>
> Cc: Albert Aribaud <albert.u.boot at aribaud.net>
> Cc: Tom Rini <trini at konsulko.com>
> Cc: Stefano Babic <sbabic at denx.de>
> Cc: Fabio Estevam <fabio.estevam at nxp.com>
> ---
>  arch/arm/Kconfig           | 3 +++
>  arch/arm/cpu/armv7/start.S | 6 ++++++
>  2 files changed, 9 insertions(+)
> 
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 7f6ab4a..787f2b1 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -97,6 +97,9 @@ config ARM_ERRATA_833069
>  config ARM_ERRATA_833471
>  	bool
>  
> +config ARM_ERRATA_845369
> +       bool
> +
>  config ARM_ERRATA_852421
>  	bool
>  
> diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
> index f06fd28..7b84a7a 100644
> --- a/arch/arm/cpu/armv7/start.S
> +++ b/arch/arm/cpu/armv7/start.S
> @@ -187,6 +187,12 @@ ENTRY(cpu_init_cp15)
>  	mcr	p15, 0, r0, c15, c0, 1	@ write diagnostic register
>  #endif
>  
> +#ifdef CONFIG_ARM_ERRATA_845369
> +	mrc     p15, 0, r0, c15, c0, 1	@ read diagnostic register
> +	orr     r0, r0, #1 << 22	@ set bit #22
> +	mcr     p15, 0, r0, c15, c0, 1	@ write diagnostic register
> +#endif
> +
>  	mov	r5, lr			@ Store my Caller
>  	mrc	p15, 0, r1, c0, c0, 0	@ r1 has Read Main ID Register (MIDR)
>  	mov	r3, r1, lsr #20		@ get variant field
> 

Reviewed-by: Stefano Babic <sbabic at denx.de>

Best regards,
Stefano Babic

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