[U-Boot] [linux-sunxi] [PATCH 1/2] sunxi: add PRCM secure switch register definition

[Chen-Yu Tsai]

On Tue, Aug 8, 2017 at 2:46 PM,  <icenowy at aosc.io> wrote:
> 在 2017-08-08 12:13，Chen-Yu Tsai 写道：
>>
>> On Thu, Jul 20, 2017 at 2:00 PM, Icenowy Zheng <icenowy at aosc.io> wrote:
>>>
>>> Some new Allwinner SoCs' PRCM has a secure switch register, which
>>> controls the access to some clock and power registers in PRCM block.
>>>
>>> Add the definition of this register and its bits in the PRCM header
>>> file.
>>>
>>> Signed-off-by: Icenowy Zheng <icenowy at aosc.io>
>>
>>
>> Could you provide a reference as to where or how you found out
>> about this?
>
>
> https://github.com/tinalinux/brandy/blob/r18-v0.9/arm-trusted-firmware-1.0/plat/sun50iw1p1/sunxi_security.c#L105

I assume you've mapped out what each bit means by testing it?

Tested-by: Chen-Yu Tsai <wens at csie.org>