[U-Boot] [PATCHv2 02/10] net: mvpp2x: fix phy connected to wrong mdio issue

[Joe Hershberger]

On Wed, Aug 9, 2017 at 2:37 AM,  <stefanc at marvell.com> wrote:
> From: Stefan Chulski <stefanc at marvell.com>
>
> A8K marvell SoC has two South Bridge communication controllers(CP0 and CP1).
> Each communication controller has packet processor ports and MDIO.
> On MACHIATOBin board ports from CP1 are connected to mdio on CP0.
>
> Issue:
> Wrong base address is assigned to MDIO interface during probe.
>
> Fix:
> Get MDIO address from PHY handler parent base address.
>
> This should be refined in the future when MDIO driver is implemented.
>
> Signed-off-by: Stefan Chulski <stefanc at marvell.com>
> Tested-by: iSoC Platform CI <ykjenk at marvell.com>
> Reviewed-by: Igal Liberman <igall at marvell.com>

Acked-by: Joe Hershberger <joe.hershberger at ni.com>