[U-Boot] [PATCH] imx: imx6: Move gpr_init() function to soc.c
Stefano Babic
sbabic at denx.de
Thu Aug 24 13:02:21 UTC 2017
Hi Breno,
On 24/08/2017 15:00, Breno Lima wrote:
> Since the gpr_init() function is common for boards using MX6S, MX6DL, MX6D,
> MX6Q and MX6QP processors move it to the soc.c file.
>
Fully agree !
I took a loog a couple of days ago and I saw how much cut&paste code is
in board/. Thanks, that you did it !
> Signed-off-by: Breno Lima <breno.lima at nxp.com>
> ---
> arch/arm/include/asm/mach-imx/sys_proto.h | 2 ++
> arch/arm/mach-imx/mx6/soc.c | 17 +++++++++++++++++
> board/bachmann/ot1200/ot1200.c | 11 -----------
> board/barco/platinum/platinum.h | 11 -----------
> board/congatec/cgtqmx6eval/cgtqmx6eval.c | 11 -----------
> board/el/el6x/el6x.c | 11 -----------
> board/engicam/common/spl.c | 11 -----------
> board/freescale/mx6sabreauto/mx6sabreauto.c | 17 -----------------
> board/freescale/mx6sabresd/mx6sabresd.c | 17 -----------------
> board/gateworks/gw_ventana/gw_ventana_spl.c | 11 -----------
> board/kosagi/novena/novena_spl.c | 11 -----------
> board/liebherr/mccmon6/spl.c | 11 -----------
> board/phytec/pcm058/pcm058.c | 12 ------------
> board/phytec/pfla02/pfla02.c | 11 -----------
> board/solidrun/mx6cuboxi/mx6cuboxi.c | 11 -----------
> board/toradex/apalis_imx6/apalis_imx6.c | 11 -----------
> board/toradex/colibri_imx6/colibri_imx6.c | 11 -----------
> board/udoo/udoo_spl.c | 11 -----------
> board/wandboard/spl.c | 11 -----------
> 19 files changed, 19 insertions(+), 200 deletions(-)
>
> diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h
> index 046df62..436ba9a 100644
> --- a/arch/arm/include/asm/mach-imx/sys_proto.h
> +++ b/arch/arm/include/asm/mach-imx/sys_proto.h
> @@ -85,6 +85,8 @@ static inline u8 imx6_is_bmode_from_gpr9(void)
> }
>
> u32 imx6_src_get_boot_mode(void);
> +void gpr_init(void);
> +
> #endif /* CONFIG_MX6 */
>
> u32 get_nr_cpus(void);
> diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c
> index 9ede1f5..f8bc05e 100644
> --- a/arch/arm/mach-imx/mx6/soc.c
> +++ b/arch/arm/mach-imx/mx6/soc.c
> @@ -681,6 +681,23 @@ void imx_setup_hdmi(void)
> }
> #endif
>
> +void gpr_init(void)
> +{
> + struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
> +
> + /* enable AXI cache for VDOA/VPU/IPU */
> + writel(0xF00000CF, &iomux->gpr[4]);
> + if (is_mx6dqp()) {
> + /* set IPU AXI-id1 Qos=0x1 AXI-id0/2/3 Qos=0x7 */
> + writel(0x77177717, &iomux->gpr[6]);
> + writel(0x77177717, &iomux->gpr[7]);
> + } else {
> + /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
> + writel(0x007F007F, &iomux->gpr[6]);
> + writel(0x007F007F, &iomux->gpr[7]);
> + }
> +}
> +
> #ifdef CONFIG_IMX_BOOTAUX
> int arch_auxiliary_core_up(u32 core_id, u32 boot_private_data)
> {
> diff --git a/board/bachmann/ot1200/ot1200.c b/board/bachmann/ot1200/ot1200.c
> index df10d6a..9465cea 100644
> --- a/board/bachmann/ot1200/ot1200.c
> +++ b/board/bachmann/ot1200/ot1200.c
> @@ -169,17 +169,6 @@ static void ccgr_init(void)
> writel(0x000003FF, &ccm->CCGR6);
> }
>
> -static void gpr_init(void)
> -{
> - struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
> -
> - /* enable AXI cache for VDOA/VPU/IPU */
> - writel(0xF00000CF, &iomux->gpr[4]);
> - /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
> - writel(0x007F007F, &iomux->gpr[6]);
> - writel(0x007F007F, &iomux->gpr[7]);
> -}
> -
> int board_early_init_f(void)
> {
> ccgr_init();
> diff --git a/board/barco/platinum/platinum.h b/board/barco/platinum/platinum.h
> index d3ea8bd..3013ed9 100644
> --- a/board/barco/platinum/platinum.h
> +++ b/board/barco/platinum/platinum.h
> @@ -75,15 +75,4 @@ static inline void ccgr_init(void)
> writel(0x000003FF, &ccm->CCGR6);
> }
>
> -static inline void gpr_init(void)
> -{
> - struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
> -
> - /* enable AXI cache for VDOA/VPU/IPU */
> - writel(0xF00000CF, &iomux->gpr[4]);
> - /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
> - writel(0x007F007F, &iomux->gpr[6]);
> - writel(0x007F007F, &iomux->gpr[7]);
> -}
> -
> #endif /* _PLATINUM_H_ */
> diff --git a/board/congatec/cgtqmx6eval/cgtqmx6eval.c b/board/congatec/cgtqmx6eval/cgtqmx6eval.c
> index 8cd0090..2ed66d3 100644
> --- a/board/congatec/cgtqmx6eval/cgtqmx6eval.c
> +++ b/board/congatec/cgtqmx6eval/cgtqmx6eval.c
> @@ -955,17 +955,6 @@ static void ccgr_init(void)
> writel(0x000003FF, &ccm->CCGR6);
> }
>
> -static void gpr_init(void)
> -{
> - struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
> -
> - /* enable AXI cache for VDOA/VPU/IPU */
> - writel(0xF00000CF, &iomux->gpr[4]);
> - /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
> - writel(0x007F007F, &iomux->gpr[6]);
> - writel(0x007F007F, &iomux->gpr[7]);
> -}
> -
> /* Define a minimal structure so that the part number can be read via SPL */
> struct mfgdata {
> unsigned char tsize;
> diff --git a/board/el/el6x/el6x.c b/board/el/el6x/el6x.c
> index 6b98b5c..fb128f5 100644
> --- a/board/el/el6x/el6x.c
> +++ b/board/el/el6x/el6x.c
> @@ -570,17 +570,6 @@ static void ccgr_init(void)
> writel(0x000003FF, &ccm->CCGR6);
> }
>
> -static void gpr_init(void)
> -{
> - struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
> -
> - /* enable AXI cache for VDOA/VPU/IPU */
> - writel(0xF00000CF, &iomux->gpr[4]);
> - /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
> - writel(0x007F007F, &iomux->gpr[6]);
> - writel(0x007F007F, &iomux->gpr[7]);
> -}
> -
> /*
> * This section requires the differentiation between iMX6 Sabre boards, but
> * for now, it will configure only for the mx6q variant.
> diff --git a/board/engicam/common/spl.c b/board/engicam/common/spl.c
> index a8a7cf3..29a27ce 100644
> --- a/board/engicam/common/spl.c
> +++ b/board/engicam/common/spl.c
> @@ -332,17 +332,6 @@ static void ccgr_init(void)
> #endif
> }
>
> -static void gpr_init(void)
> -{
> - struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
> -
> - /* enable AXI cache for VDOA/VPU/IPU */
> - writel(0xF00000CF, &iomux->gpr[4]);
> - /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
> - writel(0x007F007F, &iomux->gpr[6]);
> - writel(0x007F007F, &iomux->gpr[7]);
> -}
> -
> static void spl_dram_init(void)
> {
> #ifdef CONFIG_MX6QDL
> diff --git a/board/freescale/mx6sabreauto/mx6sabreauto.c b/board/freescale/mx6sabreauto/mx6sabreauto.c
> index f8f77f6..15ca029 100644
> --- a/board/freescale/mx6sabreauto/mx6sabreauto.c
> +++ b/board/freescale/mx6sabreauto/mx6sabreauto.c
> @@ -798,23 +798,6 @@ static void ccgr_init(void)
> writel(0x000003FF, &ccm->CCGR6);
> }
>
> -static void gpr_init(void)
> -{
> - struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
> -
> - /* enable AXI cache for VDOA/VPU/IPU */
> - writel(0xF00000CF, &iomux->gpr[4]);
> - if (is_mx6dqp()) {
> - /* set IPU AXI-id1 Qos=0x1 AXI-id0/2/3 Qos=0x7 */
> - writel(0x77177717, &iomux->gpr[6]);
> - writel(0x77177717, &iomux->gpr[7]);
> - } else {
> - /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
> - writel(0x007F007F, &iomux->gpr[6]);
> - writel(0x007F007F, &iomux->gpr[7]);
> - }
> -}
> -
> static int mx6q_dcd_table[] = {
> 0x020e0798, 0x000C0000,
> 0x020e0758, 0x00000000,
> diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c
> index 9a562b3..5b50bc8 100644
> --- a/board/freescale/mx6sabresd/mx6sabresd.c
> +++ b/board/freescale/mx6sabresd/mx6sabresd.c
> @@ -747,23 +747,6 @@ static void ccgr_init(void)
> writel(0x000003FF, &ccm->CCGR6);
> }
>
> -static void gpr_init(void)
> -{
> - struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
> -
> - /* enable AXI cache for VDOA/VPU/IPU */
> - writel(0xF00000CF, &iomux->gpr[4]);
> - if (is_mx6dqp()) {
> - /* set IPU AXI-id1 Qos=0x1 AXI-id0/2/3 Qos=0x7 */
> - writel(0x77177717, &iomux->gpr[6]);
> - writel(0x77177717, &iomux->gpr[7]);
> - } else {
> - /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
> - writel(0x007F007F, &iomux->gpr[6]);
> - writel(0x007F007F, &iomux->gpr[7]);
> - }
> -}
> -
> static int mx6q_dcd_table[] = {
> 0x020e0798, 0x000C0000,
> 0x020e0758, 0x00000000,
> diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c
> index 9524da7..c2e370b 100644
> --- a/board/gateworks/gw_ventana/gw_ventana_spl.c
> +++ b/board/gateworks/gw_ventana/gw_ventana_spl.c
> @@ -583,17 +583,6 @@ static void ccgr_init(void)
> writel(0x000003FF, &ccm->CCGR6);
> }
>
> -static void gpr_init(void)
> -{
> - struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
> -
> - /* enable AXI cache for VDOA/VPU/IPU */
> - writel(0xF00000CF, &iomux->gpr[4]);
> - /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
> - writel(0x007F007F, &iomux->gpr[6]);
> - writel(0x007F007F, &iomux->gpr[7]);
> -}
> -
> /*
> * called from C runtime startup code (arch/arm/lib/crt0.S:_main)
> * - we have a stack and a place to store GD, both in SRAM
> diff --git a/board/kosagi/novena/novena_spl.c b/board/kosagi/novena/novena_spl.c
> index 3645b75..512f06d 100644
> --- a/board/kosagi/novena/novena_spl.c
> +++ b/board/kosagi/novena/novena_spl.c
> @@ -550,17 +550,6 @@ static void ccgr_init(void)
> writel(0x000003FF, &ccm->CCGR6);
> }
>
> -static void gpr_init(void)
> -{
> - struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
> -
> - /* enable AXI cache for VDOA/VPU/IPU */
> - writel(0xF00000CF, &iomux->gpr[4]);
> - /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
> - writel(0x007F007F, &iomux->gpr[6]);
> - writel(0x007F007F, &iomux->gpr[7]);
> -}
> -
> /*
> * called from C runtime startup code (arch/arm/lib/crt0.S:_main)
> * - we have a stack and a place to store GD, both in SRAM
> diff --git a/board/liebherr/mccmon6/spl.c b/board/liebherr/mccmon6/spl.c
> index 15844ef..a2f804d 100644
> --- a/board/liebherr/mccmon6/spl.c
> +++ b/board/liebherr/mccmon6/spl.c
> @@ -260,17 +260,6 @@ static void ccgr_init(void)
> writel(0x000003FF, &ccm->CCGR6);
> }
>
> -static void gpr_init(void)
> -{
> - struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
> -
> - /* enable AXI cache for VDOA/VPU/IPU */
> - writel(0xF00000CF, &iomux->gpr[4]);
> - /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
> - writel(0x007F007F, &iomux->gpr[6]);
> - writel(0x007F007F, &iomux->gpr[7]);
> -}
> -
> static void spl_dram_init(void)
> {
> if (is_cpu_type(MXC_CPU_MX6SOLO)) {
> diff --git a/board/phytec/pcm058/pcm058.c b/board/phytec/pcm058/pcm058.c
> index 4257fbc..1538158 100644
> --- a/board/phytec/pcm058/pcm058.c
> +++ b/board/phytec/pcm058/pcm058.c
> @@ -487,18 +487,6 @@ static void ccgr_init(void)
> writel(0x000003FF, &ccm->CCGR6);
> }
>
> -static void gpr_init(void)
> -{
> - struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
> -
> - /* enable AXI cache for VDOA/VPU/IPU */
> - writel(0xF00000CF, &iomux->gpr[4]);
> - /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
> - writel(0x007F007F, &iomux->gpr[6]);
> - writel(0x007F007F, &iomux->gpr[7]);
> -}
> -
> -
> static void spl_dram_init(void)
> {
> struct mx6_ddr_sysinfo sysinfo = {
> diff --git a/board/phytec/pfla02/pfla02.c b/board/phytec/pfla02/pfla02.c
> index 8d2ce63..ec9264d 100644
> --- a/board/phytec/pfla02/pfla02.c
> +++ b/board/phytec/pfla02/pfla02.c
> @@ -550,17 +550,6 @@ static void ccgr_init(void)
> writel(0x000003FF, &ccm->CCGR6);
> }
>
> -static void gpr_init(void)
> -{
> - struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
> -
> - /* enable AXI cache for VDOA/VPU/IPU */
> - writel(0xF00000CF, &iomux->gpr[4]);
> - /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
> - writel(0x007F007F, &iomux->gpr[6]);
> - writel(0x007F007F, &iomux->gpr[7]);
> -}
> -
> static void spl_dram_init(struct mx6_ddr3_cfg *mem_ddr)
> {
> struct mx6_ddr_sysinfo sysinfo = {
> diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c b/board/solidrun/mx6cuboxi/mx6cuboxi.c
> index 7e59fb2..986abc5 100644
> --- a/board/solidrun/mx6cuboxi/mx6cuboxi.c
> +++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c
> @@ -581,17 +581,6 @@ static void ccgr_init(void)
> writel(0x000003FF, &ccm->CCGR6);
> }
>
> -static void gpr_init(void)
> -{
> - struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
> -
> - /* enable AXI cache for VDOA/VPU/IPU */
> - writel(0xF00000CF, &iomux->gpr[4]);
> - /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
> - writel(0x007F007F, &iomux->gpr[6]);
> - writel(0x007F007F, &iomux->gpr[7]);
> -}
> -
> static void spl_dram_init(int width)
> {
> struct mx6_ddr_sysinfo sysinfo = {
> diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c
> index 2fd9623..ebc6c12 100644
> --- a/board/toradex/apalis_imx6/apalis_imx6.c
> +++ b/board/toradex/apalis_imx6/apalis_imx6.c
> @@ -1160,17 +1160,6 @@ static void ccgr_init(void)
> writel(0x000000FB, &ccm->ccosr);
> }
>
> -static void gpr_init(void)
> -{
> - struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
> -
> - /* enable AXI cache for VDOA/VPU/IPU */
> - writel(0xF00000CF, &iomux->gpr[4]);
> - /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
> - writel(0x007F007F, &iomux->gpr[6]);
> - writel(0x007F007F, &iomux->gpr[7]);
> -}
> -
> static void ddr_init(int *table, int size)
> {
> int i;
> diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c
> index d30391f..669d912 100644
> --- a/board/toradex/colibri_imx6/colibri_imx6.c
> +++ b/board/toradex/colibri_imx6/colibri_imx6.c
> @@ -1037,17 +1037,6 @@ static void ccgr_init(void)
> writel(0x000000FB, &ccm->ccosr);
> }
>
> -static void gpr_init(void)
> -{
> - struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
> -
> - /* enable AXI cache for VDOA/VPU/IPU */
> - writel(0xF00000CF, &iomux->gpr[4]);
> - /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
> - writel(0x007F007F, &iomux->gpr[6]);
> - writel(0x007F007F, &iomux->gpr[7]);
> -}
> -
> static void ddr_init(int *table, int size)
> {
> int i;
> diff --git a/board/udoo/udoo_spl.c b/board/udoo/udoo_spl.c
> index e83e7c3..3645969 100644
> --- a/board/udoo/udoo_spl.c
> +++ b/board/udoo/udoo_spl.c
> @@ -211,17 +211,6 @@ static void ccgr_init(void)
> writel(0x000003FF, &ccm->CCGR6);
> }
>
> -static void gpr_init(void)
> -{
> - struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
> -
> - /* enable AXI cache for VDOA/VPU/IPU */
> - writel(0xF00000FF, &iomux->gpr[4]);
> - /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
> - writel(0x007F007F, &iomux->gpr[6]);
> - writel(0x007F007F, &iomux->gpr[7]);
> -}
> -
> static void spl_dram_init(void)
> {
> if (is_cpu_type(MXC_CPU_MX6DL)) {
> diff --git a/board/wandboard/spl.c b/board/wandboard/spl.c
> index 47082a8..99a0286 100644
> --- a/board/wandboard/spl.c
> +++ b/board/wandboard/spl.c
> @@ -266,17 +266,6 @@ static void ccgr_init(void)
> writel(0x000003FF, &ccm->CCGR6);
> }
>
> -static void gpr_init(void)
> -{
> - struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
> -
> - /* enable AXI cache for VDOA/VPU/IPU */
> - writel(0xF00000CF, &iomux->gpr[4]);
> - /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
> - writel(0x007F007F, &iomux->gpr[6]);
> - writel(0x007F007F, &iomux->gpr[7]);
> -}
> -
> static void spl_dram_init(void)
> {
> if (is_cpu_type(MXC_CPU_MX6SOLO)) {
>
Acked-by: Stefano Babic <sbabic at denx.de>
Best regards,
Stefano Babic
--
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