[U-Boot] [V2 1/2] armv8: ls1043a: modify the detecting way to cover all variants
Wenbin song
wenbin.song at nxp.com
Fri Dec 1 06:36:10 UTC 2017
There are many variants for ls1043a. Modify the detecting way to
make that the below fixup apply to all variants of ls1043a.
- Fix GIC offset for rev1.1
- Fix msi node for rev1.1
- erratum_a010151
Signed-off-by: Wenbin Song <wenbin.song at nxp.com>
---
Changes for V1:
None.
---
arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 4 ++--
arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 5 ++---
arch/arm/include/asm/arch-fsl-layerscape/soc.h | 3 +++
drivers/usb/common/fsl-errata.c | 7 +++++--
4 files changed, 12 insertions(+), 7 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
index cae59da803..3c32c0f860 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
@@ -145,7 +145,7 @@ static void fdt_fixup_gic(void *blob)
val = gur_in32(&gur->svr);
- if (SVR_SOC_VER(val) != SVR_LS1043A) {
+ if (!IS_SVR_DEV(val, SVR_DEV_LS1043A)) {
align_64k = 1;
} else if (SVR_REV(val) != REV1_0) {
val = scfg_in32(&scfg->gic_align) & (0x01 << GIC_ADDR_BIT);
@@ -327,7 +327,7 @@ static void fdt_fixup_msi(void *blob)
rev = gur_in32(&gur->svr);
- if (SVR_SOC_VER(rev) != SVR_LS1043A)
+ if (!IS_SVR_DEV(rev, SVR_DEV_LS1043A))
return;
rev = SVR_REV(rev);
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
index fa93096c68..54b825a626 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
+++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
@@ -37,9 +37,8 @@ ENTRY(get_gic_offset)
ldr x2, =DCFG_CCSR_SVR
ldr w2, [x2]
rev w2, w2
- mov w3, w2
- ands w3, w3, #SVR_WO_E << 8
- mov w4, #SVR_LS1043A << 8
+ lsr w3, w2, #16
+ ldr w4, =SVR_DEV_LS1043A
cmp w3, w4
b.ne 1f
ands w2, w2, #0xff
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
index 247f09e0f5..a2a039ec53 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
@@ -77,6 +77,7 @@ struct cpu_type {
#define SVR_LS2041A 0x870914
#define SVR_DEV_LS2080A 0x8701
+#define SVR_DEV_LS1043A 0x8792
#define SVR_MAJ(svr) (((svr) >> 4) & 0xf)
#define SVR_MIN(svr) (((svr) >> 0) & 0xf)
@@ -85,6 +86,8 @@ struct cpu_type {
#define IS_E_PROCESSOR(svr) (!((svr >> 8) & 0x1))
#define IS_SVR_REV(svr, maj, min) \
((SVR_MAJ(svr) == (maj)) && (SVR_MIN(svr) == (min)))
+#define IS_SVR_DEV(svr, dev) \
+ (((svr) >> 16) == (dev))
/* ahci port register default value */
#define AHCI_PORT_PHY_1_CFG 0xa003fffe
diff --git a/drivers/usb/common/fsl-errata.c b/drivers/usb/common/fsl-errata.c
index 823beb32f6..c20c9a3567 100644
--- a/drivers/usb/common/fsl-errata.c
+++ b/drivers/usb/common/fsl-errata.c
@@ -198,6 +198,11 @@ bool has_erratum_a010151(void)
u32 svr = get_svr();
u32 soc = SVR_SOC_VER(svr);
+#ifdef CONFIG_ARM64
+ if (IS_SVR_DEV(svr, SVR_DEV_LS1043A))
+ return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
+#endif
+
switch (soc) {
#ifdef CONFIG_ARM64
case SVR_LS2080A:
@@ -209,8 +214,6 @@ bool has_erratum_a010151(void)
case SVR_LS1046A:
case SVR_LS1012A:
return IS_SVR_REV(svr, 1, 0);
- case SVR_LS1043A:
- return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
#endif
#ifdef CONFIG_ARCH_LS1021A
case SOC_VER_LS1020:
--
2.14.1
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