[U-Boot] [PATCH 09/22] mtd: nand: automate NAND timings selection

[Masahiro Yamada]

2017-12-05 7:37 GMT+09:00 York Sun <york.sun at nxp.com>:
> On 11/21/2017 09:47 AM, Masahiro Yamada wrote:
>> From: Boris Brezillon <boris.brezillon at free-electrons.com>
>>
>> The NAND framework provides several helpers to query timing modes supported
>> by a NAND chip, but this implies that all NAND controller drivers have
>> to implement the same timings selection dance. Also currently NAND
>> devices can be resetted at arbitrary places which also resets the timing
>> for ONFI chips to timing mode 0.
>>
>> Provide a common logic to select the best timings based on ONFI or
>> ->onfi_timing_mode_default information. Hook this into nand_reset()
>> to make sure the new timing is applied each time during a reset.
>>
>> NAND controller willing to support timings adjustment should just
>> implement the ->setup_data_interface() method.
>>
>> Signed-off-by: Boris Brezillon <boris.brezillon at free-electrons.com>
>> Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
>> [Linux commit: d8e725dd831186a3595036b2b1df9f68cbc6efa3]
>> Signed-off-by: Masahiro Yamada <yamada.masahiro at socionext.com>
>>
>> ---
>>
>>  drivers/mtd/nand/nand_base.c | 155 +++++++++++++++++++++++++++++++++++++++++++
>>  include/linux/mtd/nand.h     |  14 ++--
>>  2 files changed, 165 insertions(+), 4 deletions(-)
>>
>
> I am having a weird problem with this patch. My board is T2080QDS,
> powerpc-based. Booting from SD, if the environmental variable sectors
> are invalid, the default variables are loaded. U-Boot crashes after
> hitting a key to stop the autoboot. However, if the environmental
> variables are valid (even with the default values), U-Boot is fine. Git
> bisect points to this patch. I don't see a direct connection between
> this patch and the failure. Any suggestion?
>
> Please see the log with this commit (27c4792cd23) and one commit before
> this (b893e83330662).
>
> York
>
>
> Log 1, failing case with invalid environment
>
> SD boot...
> Initializing....using SPD
> WARNING: Calling __hwconfig without a buffer and before environment is ready
> WARNING: Calling __hwconfig without a buffer and before environment is ready
> WARNING: Calling __hwconfig without a buffer and before environment is ready
> WARNING: Calling __hwconfig without a buffer and before environment is ready
> 6 GiB left unmapped
>
>
> U-Boot 2017.11-00208-g27c4792 (Dec 04 2017 - 14:18:57 -0800)
>
> CPU0:  T2080E, Version: 1.1, (0x85380011)
> Core:  e6500, Version: 2.0, (0x80400120)
> Clock Configuration:
>        CPU0:1200 MHz, CPU1:1200 MHz, CPU2:1200 MHz, CPU3:1200 MHz,
>        CCB:400  MHz,
>        DDR:933.333 MHz (1866.667 MT/s data rate) (Asynchronous), IFC:400
>  MHz
>        FMAN1: 466.667 MHz
>        QMAN:  200 MHz
>        PME:   400 MHz
> L1:    D-cache 32 KiB enabled
>        I-cache 32 KiB enabled
> Reset Configuration Word (RCW):
>        00000000: 0c070012 0e000000 00000000 00000000
>        00000010: 66150002 00000000 68104000 c1000000
>        00000020: 00000000 00000000 00000000 000307fc
>        00000030: 00000000 00000000 00000000 00000004
> Board: T2080QDS, Sys ID: 0x28, Board Arch: V1, Board Version: A, boot
> from SD/MMC
> FPGA: v11 (T1040QDS_2014_0318_1724), build 317 on Tue Mar 18 21:24:26 2014
> SERDES Reference Clocks:
> SD1_CLK1=156.25MHZ, SD1_CLK2=100.00MHz
> SD2_CLK1=100.00MHz, SD2_CLK2=100.00MHz
> I2C:   ready
> SPI:   ready
> DRAM:  Detected UDIMM
> 6 GiB left unmapped
> 8 GiB (DDR3, 64-bit, CL=13, ECC on)
> Flash: 128 MiB
> L2:    2 MiB enabled
> Corenet Platform Cache: 512 KiB enabled
> Using SERDES1 Protocol: 102 (0x66)
> Using SERDES2 Protocol: 21 (0x15)
> SRIO1: disabled
> SRIO2: disabled
> RNG: Instantiation failed with error 2000025b
> SEC0: RNG instantiated
> NAND:  512 MiB
> MMC:   FSL_SDHC: 0
> *** Warning - bad CRC, using default environment
>
> EEPROM: NXID v1
> PCIe1: Root Complex, x1 gen1, regs @ 0xfe240000
>   01:00.0     - 8086:107d - Network controller
> PCIe1: Bus 00 - 01
> PCIe2: Root Complex, no link, regs @ 0xfe250000
> PCIe2: Bus 02 - 02
> PCIe3: disabled
> PCIe4: Root Complex, no link, regs @ 0xfe270000
> PCIe4: Bus 03 - 03
> In:    serial
> Out:   serial
> Err:   serial
> Net:
> MMC read: dev # 0, block # 2080, count 128 ...
> Fman1: Data at 7faf67d0 is not a firmware
> e1000#0: Out of Memory!


Looks like malloc() failed.


> No ethernet found.
> Hit any key to stop autoboot:  0
> (York: Hit a key to stop the counting down here)
> ERROR : memory not allocated


This error message comes from xmalloc() or xrealloc().



I think your board grew in size by my commit.


Does disabling some features solve your problem?





-- 
Best Regards
Masahiro Yamada