[U-Boot] [PATCH] arm: arm64: only use general regs

[Peng Fan]

Hi Alexander,
On Fri, Dec 01, 2017 at 10:46:29PM +0100, Alexander Graf wrote:
>
>
>On 28.11.17 03:09, Peng Fan wrote:
>> When compiling with android toolchain, there is an instruction
>> "str     q0, [x8],#16", but x8 is not 16bytes aligned,
>> this instruction will trigger sync abort.
>> 
>> So, following Linux kernel, only use general regs for arm64.
>> If not, compiler may use simd registers Q[x]. We need to avoid
>> using simd registers in U-Boot, because load/store Q[x] has
>> restriction that 128bits aligned when str/ldr.
>> 
>> Signed-off-by: Peng Fan <peng.fan at nxp.com>
>
>The compiler should only output 16-byte-alignemnt-requiring instructions
>when it can safely assume that the variable in question is 16 byte aligned.
>
>Where did x8 come from? That was probably just an unsafe cast?

I am not able to resetup my compiler enviorment, it's long time
since we found this issue.

Just objdump and seems it is memset/memcpy,

00000000007ee708 <memset>:
  7ee708:       92400804        and     x4, x0, #0x7
  7ee70c:       aa0003e3        mov     x3, x0

.......

  7ee764:       aa0003e8        mov     x8, x0
  7ee768:       d2800007        mov     x7, #0x0                        // #0
  7ee76c:       3c810500        str     q0, [x8], #16

Thanks,
Peng

>
>For reference, I ran into something similar recently on 32bit ARM:
>
>  https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82445
>
>And this indeed turned out to be a compiler bug.
>
>FWIW the main reason Linux doesn't want to use FPU registers in kernel
>space is simply that it doesn't want to bother saving/restoring them on
>syscalls or interrupts. But I don't quite see why we would care in U-Boot.
>
>
>Alex
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