[U-Boot] [PATCH] sunxi: Add support for Libre Computer Board ALL-H3-CC H3 ver.

Thu Dec 7 13:00:45 UTC 2017

The Libre Computer Board ALL-H3-CC from Libre Technology is a Raspberry
Pi B+ form factor single board computer based on the Allwinner H3 SoC.
The board has 1GB DDR3 SDRAM, provided by 4 2Gb chips. The mounting holes
and connectors are in the exact same position as on the Raspberry Pi B+.

Raspberry Pi B+ like peripherals supported on this board include:

  - Power input through micro-USB connector (without USB OTG)
  - Native 100 Mbps ethernet using the internal PHY, as opposed to
    USB-based on the RPi
  - 4x USB 2.0 host ports, directly connected to the SoC, as opposed to
    being connected through a USB 2.0 hub on the RPi
  - TV and audio output on a 3.5mm TRRS jack
  - HDMI output
  - Micro-SD card slot
  - Standard RPi B+ GPIO header, with the standard peripherals routed to
    the same pins.

    * 5V, 3.3V power, and ground
    * I2C0 on the H3 is routed to I2C1 pins on the RPi header
    * I2C1 on the H3 is routed to I2C0 pins on the RPi header
    * UART1 on the H3 is routed to UART0 pins on the RPi header
    * SPI0 on the H3 is routed to SPI0 pins on the RPi header,
      with GPIO pin PA17 replacing the missing Chip Select 1
    * I2S1 on the H3 is routed to PCM pins on the RPi header

  - Additional peripherals from the H3 are available on different pins.
    These include I2S0, JTAG, PWM1, SPDIF, SPI1, and UART3

In addition, there are a number of new features:

  - Console UART header
  - Consumer IR receiver
  - Camera interface (not compatible with RPi)
  - Onboard microphone
  - eMMC expansion module port
  - Heatsink mounting holes

This patch adds defconfig and dts files for this board. The dts file is
the same as the one submitted for inclusion in Linux, with some minor
revisions to match the dtsi file and old EMAC bindings in U-boot.

Since the OTG controller is wired to a USB host port, and the H3 has
proper USB hosts to handle host mode, the MUSB driver is not enabled.

Signed-off-by: Chen-Yu Tsai <wens at csie.org>
---
 arch/arm/dts/Makefile                         |   1 +
 arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts | 180 ++++++++++++++++++++++++++
 board/sunxi/MAINTAINERS                       |   5 +
 configs/libretech_all_h3_cc_h3_defconfig      |  19 +++
 4 files changed, 205 insertions(+)
 create mode 100644 arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts
 create mode 100644 configs/libretech_all_h3_cc_h3_defconfig

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index f54adb21847a..0aba72d3a72f 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -320,6 +320,7 @@ dtb-$(CONFIG_MACH_SUN8I_A83T) += \
 dtb-$(CONFIG_MACH_SUN8I_H3) += \
 	sun8i-h2-plus-orangepi-zero.dtb \
 	sun8i-h3-bananapi-m2-plus.dtb \
+	sun8i-h3-libretech-all-h3-cc.dtb \
 	sun8i-h3-orangepi-2.dtb \
 	sun8i-h3-orangepi-lite.dtb \
 	sun8i-h3-orangepi-one.dtb \
diff --git a/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts b/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts
new file mode 100644
index 000000000000..97b993f636f9
--- /dev/null
+++ b/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts
@@ -0,0 +1,180 @@
+/*
+ * Copyright (C) 2017 Chen-Yu Tsai <wens at csie.org>
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+/dts-v1/;
+#include "sun8i-h3.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Libre Computer Board ALL-H3-CC H3";
+	compatible = "libretech,all-h3-cc-h3", "allwinner,sun8i-h3";
+
+	aliases {
+		ethernet0 = &emac;
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		pwr_led {
+			label = "librecomputer:green:pwr";
+			gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
+			default-state = "on";
+		};
+
+		status_led {
+			label = "librecomputer:blue:status";
+			gpios = <&pio 0 7 GPIO_ACTIVE_HIGH>; /* PA7 */
+		};
+	};
+
+	gpio_keys {
+		compatible = "gpio-keys";
+
+		power {
+			label = "power";
+			linux,code = <KEY_POWER>;
+			gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
+		};
+	};
+
+	reg_vcc1v2: vcc1v2 {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc1v2";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-always-on;
+		regulator-boot-on;
+		vin-supply = <&reg_vcc5v0>;
+		gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
+		enable-active-high;
+	};
+
+	reg_vcc3v3: vcc3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc3v3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&reg_vcc5v0>;
+	};
+
+	/* This represents the board's 5V input */
+	reg_vcc5v0: vcc5v0 {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
+
+	reg_vcc_dram: vcc-dram {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc-dram";
+		regulator-min-microvolt = <1500000>;
+		regulator-max-microvolt = <1500000>;
+		regulator-always-on;
+		regulator-boot-on;
+		vin-supply = <&reg_vcc5v0>;
+		gpio = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */
+		enable-active-high;
+	};
+
+	reg_vcc_io: vcc-io {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc-io";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-always-on;
+		regulator-boot-on;
+		vin-supply = <&reg_vcc3v3>;
+		gpio = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL5 */
+	};
+
+	reg_vdd_cpux: vdd-cpux {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd-cpux";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-always-on;
+		regulator-boot-on;
+		vin-supply = <&reg_vcc5v0>;
+		gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
+		enable-active-high;
+	};
+};
+
+&ehci1 {
+	status = "okay";
+};
+
+&ehci2 {
+	status = "okay";
+};
+
+&ehci3 {
+	status = "okay";
+};
+
+&emac {
+	phy = <&phy1>;
+	phy-mode = "mii";
+	allwinner,use-internal-phy;
+	allwinner,leds-active-low;
+	status = "okay";
+
+	phy1: ethernet-phy at 1 {
+		reg = <1>;
+	};
+};
+
+&ir {
+	pinctrl-names = "default";
+	pinctrl-0 = <&ir_pins_a>;
+	status = "okay";
+};
+
+&mmc0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc0_pins_a>;
+	vmmc-supply = <&reg_vcc_io>;
+	bus-width = <4>;
+	cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
+	cd-inverted;
+	status = "okay";
+};
+
+&ohci1 {
+	status = "okay";
+};
+
+&ohci2 {
+	status = "okay";
+};
+
+&ohci3 {
+	status = "okay";
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_pins_a>;
+	status = "okay";
+};
+
+&usbphy {
+	/* VBUS on USB ports are always on */
+	usb0_vbus-supply = <&reg_vcc5v0>;
+	usb1_vbus-supply = <&reg_vcc5v0>;
+	usb2_vbus-supply = <&reg_vcc5v0>;
+	usb3_vbus-supply = <&reg_vcc5v0>;
+	status = "okay";
+};
diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index ee24d709132a..ab3d891d8f98 100644
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -266,6 +266,11 @@ M:	Siarhei Siamashka <siarhei.siamashka at gmail.com>
 S:	Maintained
 F:	configs/MSI_Primo81_defconfig
 
+LIBRETECH ALL-H3-CC H3 BOARD
+M:	Chen-Yu Tsai <wens at csie.org>
+S:	Maintained
+F:	configs/libretech_all_h3_cc_h3_defconfig
+
 NANOPI-M1 BOARD
 M:	Mylène Josserand <mylene.josserand at free-electrons.com>
 S:	Maintained
diff --git a/configs/libretech_all_h3_cc_h3_defconfig b/configs/libretech_all_h3_cc_h3_defconfig
new file mode 100644
index 000000000000..1ae02c2e6889
--- /dev/null
+++ b/configs/libretech_all_h3_cc_h3_defconfig
@@ -0,0 +1,19 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_MACH_SUN8I_H3=y
+CONFIG_DRAM_CLK=672
+CONFIG_DRAM_ZQ=3881979
+CONFIG_DRAM_ODT_EN=y
+CONFIG_R_I2C_ENABLE=y
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-libretech-all-h3-cc"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL=y
+CONFIG_SPL_I2C_SUPPORT=y
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SUN8I_EMAC=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
-- 
2.15.0

