[U-Boot] Linux hang

[Goldschmidt Simon]

Pepperl+Fuchs GmbH, Mannheim
Geschaeftsfuehrer/Managing Directors: Dr.-Ing. Gunther Kegel (Vors./CEO), Werner Guthier, Mehmet Hatiboglu
Vorsitzender des Aufsichtsrats/Chairman of the supervisory board: Claus Michael
Registergericht/Register Court: AG Mannheim HRB 4713
On 2017-12-07 12:01, Siegmund, Jan wrote:
> Hi all,
> does anybody have an idea for the following problem?
>
> * FPGA is programmed using an overlay
> * FPGA writes to SDRAM via the FPGA2SDRAM-bridge
> * Linux hangs and the watchdog resets the board (the FPGA stays programmed)
> * After the reset and boot, the FPGA is reprogrammed using the same overlay
> * Now, the FPGA can write to the SDRAM without a problem
> [..]

I haven't tried this method of programming the fpga yet (only
programmed from U-Boot for now). But reading the SPL source code, it
seems as the bridges are taken out of reset if the fpga is programmed
when the SPL runs. That's a difference. And it would mean using your
way of programming the fpga, the bridges might still be in reset.

Regards,
Simon

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