[U-Boot] [PATCH 06/16] musb-new: sunxi: a64: adds support for clearing the SIDDP

[Jagan Teki]

From: Philipp Tomsich <philipp.tomsich at theobroma-systems.com>

Allwinner a64 needs to clear the SIDDP bit from PHYCTL
register once the phy_init done.

Signed-off-by: Philipp Tomsich <philipp.tomsich at theobroma-systems.com>
[jagan: reworked to fix multi-line comments]
Signed-off-by: Jagan Teki <jagan at amarulasolutions.com>
---
 arch/arm/include/asm/arch-sunxi/usb_phy.h |  1 +
 arch/arm/mach-sunxi/usb_phy.c             | 11 +++++++++++
 drivers/usb/host/ehci-sunxi.c             |  8 ++++++++
 drivers/usb/host/ohci-sunxi.c             |  8 ++++++++
 drivers/usb/musb-new/sunxi.c              |  1 +
 5 files changed, 29 insertions(+)

diff --git a/arch/arm/include/asm/arch-sunxi/usb_phy.h b/arch/arm/include/asm/arch-sunxi/usb_phy.h
index 5a9cacb..f97d415 100644
--- a/arch/arm/include/asm/arch-sunxi/usb_phy.h
+++ b/arch/arm/include/asm/arch-sunxi/usb_phy.h
@@ -19,3 +19,4 @@ void sunxi_usb_phy_power_off(int index);
 int sunxi_usb_phy_vbus_detect(int index);
 int sunxi_usb_phy_id_detect(int index);
 void sunxi_usb_phy_enable_squelch_detect(int index, int enable);
+void sunxi_usb_phy_clear_SIDDP(void *base);
diff --git a/arch/arm/mach-sunxi/usb_phy.c b/arch/arm/mach-sunxi/usb_phy.c
index 2f1cad1..1bfee40 100644
--- a/arch/arm/mach-sunxi/usb_phy.c
+++ b/arch/arm/mach-sunxi/usb_phy.c
@@ -190,6 +190,17 @@ static void sunxi_usb_phy_config(struct sunxi_usb_phy *phy)
 }
 #endif
 
+#if defined(CONFIG_MACH_SUN50I)
+void sunxi_usb_phy_clear_SIDDP(void *base)
+{
+	/* We pretend that this is always at the same offset (0x410),
+	 * even though it is 0x410 for MUSB/OTG and OHCI, but 0x810
+	 * for EHCI.  The EHCI call site will have to adjust this...
+	 */
+	clrbits_le32(base + SUNXI_USB_CSR, (1 << 1));
+}
+#endif
+
 static void sunxi_usb_phy_passby(struct sunxi_usb_phy *phy, int enable)
 {
 	unsigned long bits = 0;
diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c
index 6ecb7c4..c3432aa 100644
--- a/drivers/usb/host/ehci-sunxi.c
+++ b/drivers/usb/host/ehci-sunxi.c
@@ -61,6 +61,14 @@ static int ehci_usb_probe(struct udevice *dev)
 #endif
 
 	sunxi_usb_phy_init(priv->phy_index);
+#if defined(CONFIG_MACH_SUN50I)
+	/*
+	 * For the HCI blocks, the PHYCTL register is at 0x810, so
+	 * it's an extra 0x400 for the EHCI block.  This should go
+	 * away once the PHYs use the driver model.
+	 */
+	sunxi_usb_phy_clear_SIDDP((void *)hccr + 0x400);
+#endif
 	sunxi_usb_phy_power_on(priv->phy_index);
 
 	hcor = (struct ehci_hcor *)((uintptr_t)hccr +
diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c
index 133774f..e9eeb56 100644
--- a/drivers/usb/host/ohci-sunxi.c
+++ b/drivers/usb/host/ohci-sunxi.c
@@ -66,6 +66,14 @@ static int ohci_usb_probe(struct udevice *dev)
 #endif
 
 	sunxi_usb_phy_init(priv->phy_index);
+#if defined(CONFIG_MACH_SUN50I)
+	/*
+	 * For the HCI blocks, the PHYCTL register is at 0x810, so it's
+	 * an extra 0x400 for the EHCI block.  This should go away once
+	 * the PHYs use the driver model.
+	 */
+	sunxi_usb_phy_clear_SIDDP(regs);
+#endif
 	sunxi_usb_phy_power_on(priv->phy_index);
 
 	return ohci_register(dev, regs);
diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c
index 45ddf20..0d87582 100644
--- a/drivers/usb/musb-new/sunxi.c
+++ b/drivers/usb/musb-new/sunxi.c
@@ -281,6 +281,7 @@ static int sunxi_musb_init(struct musb *musb)
 #endif
 	sunxi_usb_phy_init(0);
 #if defined(CONFIG_MACH_SUN50I)
+	sunxi_usb_phy_clear_SIDDP(musb->mregs);
 	USBC_SelectPhyToDevice(musb->mregs, true);
 #endif
 
-- 
2.7.4