[U-Boot] [PATCH 2/5] board: TI K2G: FC SoC 1GHz and DDR3 1066 MT/s support

Lokesh Vutla lokeshvutla at ti.com
Tue Dec 19 05:03:41 UTC 2017



On Monday 18 December 2017 09:16 PM, Tom Rini wrote:
> On Mon, Dec 18, 2017 at 03:10:04PM +0530, Lokesh Vutla wrote:
> 
>> From: Rex Chang <rchang at ti.com>
>>
>> Added support for K2G EVM with FlipChip SoC of which
>> ARM/DDR3 runs at 1GHz/1066 MT/s. The patch is also
>> backward compatible with old revision EVM and EVM
>> with WireBond SoC. Their ARM/DDR3 run at 600MHz/800 MT/s.
>>
>> The new SoC supports 2 different speeds at 1GHz and 600MHz.
>> Modyfied the CPU Name to show which SoC is used in the EVM.
>> Modified the DDR3 configuration to reflect New SoC supports
>> 2 different CPU and DDR3 speeds, 1GHz/1066MT and 600MHz/800MT.
>>
>> Added new inline function board_it_k2g_g1() for the new FlipChip 1GHz,
>> and set the u-boot env variable board_name accordingly.
>>
>> Modified findfdt script in u-boot environment variable to include new k2g board type.
>>
>> Signed-off-by: Rex Chang <rchang at ti.com>
>> Signed-off-by: Lokesh Vutla <lokeshvutla at ti.com>
>> ---
>>  arch/arm/mach-keystone/include/mach/hardware.h |  7 ++++
>>  arch/arm/mach-keystone/init.c                  | 17 +++++++-
>>  board/ti/ks2_evm/board.h                       |  4 ++
>>  board/ti/ks2_evm/board_k2g.c                   | 30 +++++++++++---
>>  board/ti/ks2_evm/ddr3_k2g.c                    | 57 +++++++++++++++++++++++++-
>>  board/ti/ks2_evm/mux-k2g.h                     |  2 +-
>>  include/configs/k2g_evm.h                      |  4 +-
>>  7 files changed, 109 insertions(+), 12 deletions(-)
>>
>> diff --git a/arch/arm/mach-keystone/include/mach/hardware.h b/arch/arm/mach-keystone/include/mach/hardware.h
>> index 6629406870..e1621b27a4 100644
>> --- a/arch/arm/mach-keystone/include/mach/hardware.h
>> +++ b/arch/arm/mach-keystone/include/mach/hardware.h
>> @@ -327,6 +327,9 @@ typedef volatile unsigned int   *dv_reg_p;
>>  #define CPU_66AK2Lx	0xb9a7
>>  #define CPU_66AK2Gx	0xbb06
>>  
>> +/* Variant definitions */
>> +#define CPU_66AK2G1x	0x08
>> +
>>  /* DEVSPEED register */
>>  #define DEVSPEED_DEVSPEED_SHIFT	16
>>  #define DEVSPEED_DEVSPEED_MASK	(0xfff << 16)
>> @@ -390,6 +393,10 @@ static inline u8 cpu_revision(void)
>>  int cpu_to_bus(u32 *ptr, u32 length);
>>  void sdelay(unsigned long);
>>  
>> +#ifdef CONFIG_SOC_K2G
>> +extern int arm_speeds[];
>> +#endif
> 
> Lets not ifdef around externs.

okay.

> 
> [snip]
>> @@ -241,7 +253,8 @@ int print_cpuinfo(void)
>>  		puts("1.1\n");
>>  	else if (rev == 0)
>>  		puts("1.0\n");
>> -
>> +	else if (rev == 8)
>> +		puts("1.0\n");
> 
> Both values are rev "1.0" ?

Yeah, basically both are rev 1.0 but with different speed grades. This
is the naming convention recommended from marketing team.

Thanks and regards,
Lokesh


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