[U-Boot] [PATCH 02/12] riscv: nx25: lib: Add relative lib funcs to support RISC-V
Andes
uboot at andestech.com
Fri Dec 22 07:44:19 UTC 2017
From: Rick Chen <rick at andestech.com>
Add makefile, interrupts.c and boot.c,... functions
to support RISC-V arch.
Signed-off-by: Rick Chen <rick at andestech.com>
Signed-off-by: Rick Chen <rickchen36 at gmail.com>
Signed-off-by: Greentime Hu <green.hu at gmail.com>
Cc: Padmarao Begari <Padmarao.Begari at microsemi.com>
---
arch/riscv/lib/Makefile | 14 +++
arch/riscv/lib/boot.c | 19 ++++
arch/riscv/lib/bootm.c | 248 +++++++++++++++++++++++++++++++++++++++++++
arch/riscv/lib/cache.c | 50 +++++++++
arch/riscv/lib/interrupts.c | 76 +++++++++++++
5 files changed, 407 insertions(+), 0 deletions(-)
create mode 100644 arch/riscv/lib/Makefile
create mode 100644 arch/riscv/lib/boot.c
create mode 100644 arch/riscv/lib/bootm.c
create mode 100644 arch/riscv/lib/cache.c
create mode 100644 arch/riscv/lib/interrupts.c
diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile
new file mode 100644
index 0000000..323cf3e
--- /dev/null
+++ b/arch/riscv/lib/Makefile
@@ -0,0 +1,14 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# Copyright (C) 2017 Andes Technology Corporation
+# Rick Chen, Andes Technology Corporation <rick at andestech.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-$(CONFIG_CMD_BOOTM) += bootm.o
+obj-$(CONFIG_CMD_GO) += boot.o
+obj-y += cache.o
+obj-y += interrupts.o
diff --git a/arch/riscv/lib/boot.c b/arch/riscv/lib/boot.c
new file mode 100644
index 0000000..39ba9b4
--- /dev/null
+++ b/arch/riscv/lib/boot.c
@@ -0,0 +1,19 @@
+/*
+ * Copyright (C) 2017 Andes Technology Corporation
+ * Rick Chen, Andes Technology Corporation <rick at andestech.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+unsigned long do_go_exec(ulong (*entry)(int, char * const []),
+ int argc, char * const argv[])
+{
+ cleanup_before_linux();
+
+ return entry(argc, argv);
+}
diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c
new file mode 100644
index 0000000..44ce38b
--- /dev/null
+++ b/arch/riscv/lib/bootm.c
@@ -0,0 +1,248 @@
+/*
+ * Copyright (C) 2011 Andes Technology Corporation
+ * Shawn Lin, Andes Technology Corporation <nobuhiro at andestech.com>
+ * Macpaul Lin, Andes Technology Corporation <macpaul at andestech.com>
+ * Rick Chen, Andes Technology Corporation <rick at andestech.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <command.h>
+#include <image.h>
+#include <u-boot/zlib.h>
+#include <asm/byteorder.h>
+#include <asm/bootm.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int arch_fixup_fdt(void *blob)
+{
+ return 0;
+}
+
+#if defined(CONFIG_SETUP_MEMORY_TAGS) || \
+ defined(CONFIG_CMDLINE_TAG) || \
+ defined(CONFIG_INITRD_TAG) || \
+ defined(CONFIG_SERIAL_TAG) || \
+ defined(CONFIG_REVISION_TAG)
+static void setup_start_tag(bd_t *bd);
+
+# ifdef CONFIG_SETUP_MEMORY_TAGS
+static void setup_memory_tags(bd_t *bd);
+# endif
+static void setup_commandline_tag(bd_t *bd, char *commandline);
+
+# ifdef CONFIG_INITRD_TAG
+static void setup_initrd_tag(bd_t *bd, ulong initrd_start, ulong initrd_end);
+# endif
+static void setup_end_tag(bd_t *bd);
+
+static struct tag *params;
+#endif /* CONFIG_SETUP_MEMORY_TAGS || CONFIG_CMDLINE_TAG || CONFIG_INITRD_TAG */
+
+int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images)
+{
+ bd_t *bd = gd->bd;
+ char *s;
+ int machid = bd->bi_arch_number;
+ void (*theKernel)(int zero, int arch, uint params);
+
+#ifdef CONFIG_CMDLINE_TAG
+ char *commandline = env_get("bootargs");
+#endif
+
+ /*
+ * allow the PREP bootm subcommand, it is required for bootm to work
+ */
+ if (flag & BOOTM_STATE_OS_PREP)
+ return 0;
+
+ if ((flag != 0) && (flag != BOOTM_STATE_OS_GO))
+ return 1;
+
+ theKernel = (void (*)(int, int, uint))images->ep;
+
+ s = env_get("machid");
+ if (s) {
+ machid = simple_strtoul(s, NULL, 16);
+ printf("Using machid 0x%x from environment\n", machid);
+ }
+
+ bootstage_mark(BOOTSTAGE_ID_RUN_OS);
+
+ debug("## Transferring control to Linux (at address %08lx) ...\n",
+ (ulong)theKernel);
+
+ if (IMAGE_ENABLE_OF_LIBFDT && images->ft_len) {
+#ifdef CONFIG_OF_LIBFDT
+ debug("using: FDT\n");
+ if (image_setup_linux(images)) {
+ printf("FDT creation failed! hanging...");
+ hang();
+ }
+#endif
+ } else if (BOOTM_ENABLE_TAGS) {
+#if defined(CONFIG_SETUP_MEMORY_TAGS) || \
+ defined(CONFIG_CMDLINE_TAG) || \
+ defined(CONFIG_INITRD_TAG) || \
+ defined(CONFIG_SERIAL_TAG) || \
+ defined(CONFIG_REVISION_TAG)
+ setup_start_tag(bd);
+#ifdef CONFIG_SERIAL_TAG
+ setup_serial_tag(¶ms);
+#endif
+#ifdef CONFIG_REVISION_TAG
+ setup_revision_tag(¶ms);
+#endif
+#ifdef CONFIG_SETUP_MEMORY_TAGS
+ setup_memory_tags(bd);
+#endif
+#ifdef CONFIG_CMDLINE_TAG
+ setup_commandline_tag(bd, commandline);
+#endif
+#ifdef CONFIG_INITRD_TAG
+ if (images->rd_start && images->rd_end)
+ setup_initrd_tag(bd, images->rd_start, images->rd_end);
+#endif
+ setup_end_tag(bd);
+#endif
+
+ /* we assume that the kernel is in place */
+ printf("\nStarting kernel ...\n\n");
+
+#ifdef CONFIG_USB_DEVICE
+ {
+ extern void udc_disconnect(void);
+ udc_disconnect();
+ }
+#endif
+ }
+ cleanup_before_linux();
+ if (IMAGE_ENABLE_OF_LIBFDT && images->ft_len)
+ theKernel(0, machid, (unsigned long)images->ft_addr);
+ else
+ theKernel(0, machid, bd->bi_boot_params);
+ /* does not return */
+
+ return 1;
+}
+
+#if defined(CONFIG_SETUP_MEMORY_TAGS) || \
+ defined(CONFIG_CMDLINE_TAG) || \
+ defined(CONFIG_INITRD_TAG) || \
+ defined(CONFIG_SERIAL_TAG) || \
+ defined(CONFIG_REVISION_TAG)
+static void setup_start_tag(bd_t *bd)
+{
+ params = (struct tag *)bd->bi_boot_params;
+
+ params->hdr.tag = ATAG_CORE;
+ params->hdr.size = tag_size(tag_core);
+
+ params->u.core.flags = 0;
+ params->u.core.pagesize = 0;
+ params->u.core.rootdev = 0;
+
+ params = tag_next(params);
+}
+
+#ifdef CONFIG_SETUP_MEMORY_TAGS
+static void setup_memory_tags(bd_t *bd)
+{
+ int i;
+
+ for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+ params->hdr.tag = ATAG_MEM;
+ params->hdr.size = tag_size(tag_mem32);
+
+ params->u.mem.start = bd->bi_dram[i].start;
+ params->u.mem.size = bd->bi_dram[i].size;
+
+ params = tag_next(params);
+ }
+}
+#endif /* CONFIG_SETUP_MEMORY_TAGS */
+
+static void setup_commandline_tag(bd_t *bd, char *commandline)
+{
+ char *p;
+
+ if (!commandline)
+ return;
+
+ /* eat leading white space */
+ for (p = commandline; *p == ' '; p++)
+ ;
+
+ /* skip non-existent command lines so the kernel will still
+ * use its default command line.
+ */
+ if (*p == '\0')
+ return;
+
+ params->hdr.tag = ATAG_CMDLINE;
+ params->hdr.size =
+ (sizeof(struct tag_header) + strlen(p) + 1 + 4) >> 2;
+
+ strcpy(params->u.cmdline.cmdline, p)
+ ;
+
+ params = tag_next(params);
+}
+
+#ifdef CONFIG_INITRD_TAG
+static void setup_initrd_tag(bd_t *bd, ulong initrd_start, ulong initrd_end)
+{
+ /* an ATAG_INITRD node tells the kernel where the compressed
+ * ramdisk can be found. ATAG_RDIMG is a better name, actually.
+ */
+ params->hdr.tag = ATAG_INITRD2;
+ params->hdr.size = tag_size(tag_initrd);
+
+ params->u.initrd.start = initrd_start;
+ params->u.initrd.size = initrd_end - initrd_start;
+
+ params = tag_next(params);
+}
+#endif /* CONFIG_INITRD_TAG */
+
+#ifdef CONFIG_SERIAL_TAG
+void setup_serial_tag(struct tag **tmp)
+{
+ struct tag *params;
+ struct tag_serialnr serialnr;
+ void get_board_serial(struct tag_serialnr *serialnr);
+
+ params = *tmp;
+ get_board_serial(&serialnr);
+ params->hdr.tag = ATAG_SERIAL;
+ params->hdr.size = tag_size(tag_serialnr);
+ params->u.serialnr.low = serialnr.low;
+ params->u.serialnr.high = serialnr.high;
+ params = tag_next(params);
+ *tmp = params;
+}
+#endif
+
+#ifdef CONFIG_REVISION_TAG
+void setup_revision_tag(struct tag **in_params)
+{
+ u32 rev;
+ u32 get_board_rev(void);
+
+ rev = get_board_rev();
+ params->hdr.tag = ATAG_REVISION;
+ params->hdr.size = tag_size(tag_revision);
+ params->u.revision.rev = rev;
+ params = tag_next(params);
+}
+#endif /* CONFIG_REVISION_TAG */
+
+static void setup_end_tag(bd_t *bd)
+{
+ params->hdr.tag = ATAG_NONE;
+ params->hdr.size = 0;
+}
+
+#endif /* CONFIG_SETUP_MEMORY_TAGS || CONFIG_CMDLINE_TAG || CONFIG_INITRD_TAG */
diff --git a/arch/riscv/lib/cache.c b/arch/riscv/lib/cache.c
new file mode 100644
index 0000000..948656f
--- /dev/null
+++ b/arch/riscv/lib/cache.c
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2017 Andes Technology Corporation
+ * Rick Chen, Andes Technology Corporation <rick at andestech.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+
+void flush_dcache_range(unsigned long start, unsigned long end)
+{
+}
+
+void invalidate_icache_range(unsigned long start, unsigned long end)
+{
+}
+
+void invalidate_dcache_range(unsigned long start, unsigned long end)
+{
+}
+
+void flush_cache(unsigned long addr, unsigned long size)
+{
+}
+
+void icache_enable(void)
+{
+}
+
+void icache_disable(void)
+{
+}
+
+int icache_status(void)
+{
+ return 0;
+}
+
+void dcache_enable(void)
+{
+}
+
+void dcache_disable(void)
+{
+}
+
+int dcache_status(void)
+{
+ return 0;
+}
diff --git a/arch/riscv/lib/interrupts.c b/arch/riscv/lib/interrupts.c
new file mode 100644
index 0000000..075db8b
--- /dev/null
+++ b/arch/riscv/lib/interrupts.c
@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2016-17 Microsemi Corporation.
+ * Padmarao Begari, Microsemi Corporation <padmarao.begari at microsemi.com>
+ *
+ * Copyright (C) 2017 Andes Technology Corporation
+ * Rick Chen, Andes Technology Corporation <rick at andestech.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/ptrace.h>
+#include <asm/system.h>
+#include <asm/encoding.h>
+
+static void _exit_trap(int code, uint epc, struct pt_regs *regs);
+
+int interrupt_init(void)
+{
+ return 0;
+}
+
+/*
+ * enable interrupts
+ */
+void enable_interrupts(void)
+{
+}
+
+/*
+ * disable interrupts
+ */
+int disable_interrupts(void)
+{
+ return 0;
+}
+
+uint handle_trap(uint mcause, uint epc, struct pt_regs *regs)
+{
+ uint is_int;
+
+ is_int = (mcause & MCAUSE_INT);
+ if ((is_int) && ((mcause & MCAUSE_CAUSE) == IRQ_M_EXT))
+ external_interrupt(0); /* handle_m_ext_interrupt */
+ else if ((is_int) && ((mcause & MCAUSE_CAUSE) == IRQ_M_TIMER))
+ timer_interrupt(0); /* handle_m_timer_interrupt */
+ else
+ _exit_trap(mcause, epc, regs);
+
+ return epc;
+}
+
+/*
+ *Entry Point for PLIC Interrupt Handler
+ */
+__attribute__((weak)) void external_interrupt(struct pt_regs *regs)
+{
+}
+
+__attribute__((weak)) void timer_interrupt(struct pt_regs *regs)
+{
+}
+
+static void _exit_trap(int code, uint epc, struct pt_regs *regs)
+{
+ static const char *exception_code[] = {
+ "Instruction address misaligned",
+ "Instruction access fault",
+ "Illegal instruction",
+ "Breakpoint",
+ "Load address misaligned"
+ };
+
+ printf("exception code: %d , %s , epc %08x , ra %08lx\n",
+ code, exception_code[code], epc, regs->ra);
+}
--
1.7.1
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