[U-Boot] [PATCH v2 11/12] riscv: Modify generic codes to support RISC-V

Andes uboot at andestech.com
Tue Dec 26 05:55:58 UTC 2017


From: Rick Chen <rick at andestech.com>

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick at andestech.com>
Signed-off-by: Rick Chen <rickchen36 at gmail.com>
Signed-off-by: Greentime Hu <green.hu at gmail.com>
Reviewed-by: Tom Rini <trini at konsulko.com>
---
 arch/Kconfig     |  5 +++++
 cmd/bdinfo.c     | 15 +++++++++++++++
 common/board_f.c |  2 +-
 common/board_r.c |  4 ++--
 include/elf.h    |  5 +++++
 include/image.h  |  1 +
 6 files changed, 29 insertions(+), 3 deletions(-)

diff --git a/arch/Kconfig b/arch/Kconfig
index 0b12ed9..762230c 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -54,6 +54,10 @@ config PPC
 	select HAVE_PRIVATE_LIBGCC
 	select SUPPORT_OF_CONTROL
 
+config RISCV
+	bool "riscv architecture"
+	select SUPPORT_OF_CONTROL
+
 config SANDBOX
 	bool "Sandbox"
 	select BOARD_LATE_INIT
@@ -194,3 +198,4 @@ source "arch/sandbox/Kconfig"
 source "arch/sh/Kconfig"
 source "arch/x86/Kconfig"
 source "arch/xtensa/Kconfig"
+source "arch/riscv/Kconfig"
diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index 27ffcd5..c7ebad1 100644
--- a/cmd/bdinfo.c
+++ b/cmd/bdinfo.c
@@ -417,6 +417,21 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return 0;
 }
 
+#elif defined(CONFIG_RISCV)
+
+int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+	bd_t *bd = gd->bd;
+
+	print_num("arch_number", bd->bi_arch_number);
+	print_bi_boot_params(bd);
+	print_bi_dram(bd);
+	print_eth_ip_addr();
+	print_baudrate();
+
+	return 0;
+}
+
 #elif defined(CONFIG_ARC)
 
 int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
diff --git a/common/board_f.c b/common/board_f.c
index e46eced..0bdce64 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -218,7 +218,7 @@ static int setup_mon_len(void)
 	gd->mon_len = (ulong)&_end - (ulong)_init;
 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
 	gd->mon_len = CONFIG_SYS_MONITOR_LEN;
-#elif defined(CONFIG_NDS32) || defined(CONFIG_SH)
+#elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV)
 	gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
 #elif defined(CONFIG_SYS_MONITOR_BASE)
 	/* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
diff --git a/common/board_r.c b/common/board_r.c
index 09167c1..2a9df6b 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -126,7 +126,7 @@ static int initr_reloc_global_data(void)
 {
 #ifdef __ARM__
 	monitor_flash_len = _end - __image_copy_start;
-#elif defined(CONFIG_NDS32)
+#elif defined(CONFIG_NDS32) || defined(CONFIG_RISCV)
 	monitor_flash_len = (ulong)&_end - (ulong)&_start;
 #elif !defined(CONFIG_SANDBOX) && !defined(CONFIG_NIOS2)
 	monitor_flash_len = (ulong)&__init_end - gd->relocaddr;
@@ -704,7 +704,7 @@ static init_fnc_t init_sequence_r[] = {
 #ifdef CONFIG_DM
 	initr_dm,
 #endif
-#if defined(CONFIG_ARM) || defined(CONFIG_NDS32)
+#if defined(CONFIG_ARM) || defined(CONFIG_NDS32) || defined(CONFIG_RISCV)
 	board_init,	/* Setup chipselects */
 #endif
 	/*
diff --git a/include/elf.h b/include/elf.h
index aaecac7..fe2128f 100644
--- a/include/elf.h
+++ b/include/elf.h
@@ -613,6 +613,11 @@ unsigned long elf_hash(const unsigned char *name);
 #define R_AARCH64_NONE		0	/* No relocation.  */
 #define R_AARCH64_RELATIVE	1027	/* Adjust by program base.  */
 
+/* RISC-V relocations */
+#define R_RISCV_32		1
+#define R_RISCV_64		2
+#define R_RISCV_RELATIVE	3
+
 #ifndef __ASSEMBLER__
 int valid_elf_image(unsigned long addr);
 #endif
diff --git a/include/image.h b/include/image.h
index a128a62..a41a836 100644
--- a/include/image.h
+++ b/include/image.h
@@ -190,6 +190,7 @@ enum {
 	IH_ARCH_ARC,			/* Synopsys DesignWare ARC */
 	IH_ARCH_X86_64,			/* AMD x86_64, Intel and Via */
 	IH_ARCH_XTENSA,			/* Xtensa	*/
+	IH_ARCH_RISCV,			/* RISC-V */
 
 	IH_ARCH_COUNT,
 };
-- 
2.7.4



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