[U-Boot] [RFC] drivers: net: phy: atheros: apply the previous register setting for AR8031 to fix the voltage peak issue

[Joe Hershberger]

On Wed, Feb 1, 2017 at 1:55 PM, ken <Ken Lin> <yungching0725 at gmail.com> wrote:
> Apply the previous setting for the reserved bits in SetDes Test and System Mode Control register
> to avoid the voltage peak issue while we do the IEEE PHY comformance test
> ---
>  drivers/net/phy/atheros.c | 6 ++++++
>  1 file changed, 6 insertions(+)
>
> diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c
> index b34cdd3d87..82fe228604 100644
> --- a/drivers/net/phy/atheros.c
> +++ b/drivers/net/phy/atheros.c
> @@ -28,6 +28,8 @@ static int ar8021_config(struct phy_device *phydev)
>
>  static int ar8031_config(struct phy_device *phydev)
>  {
> +       int regval;
> +
>         if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID ||
>             phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
>                 phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_ADDR_REG,
> @@ -44,6 +46,10 @@ static int ar8031_config(struct phy_device *phydev)
>                           AR803x_RGMII_RX_CLK_DLY);
>         }
>
> +        phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_ADDR_REG, AR803x_DEBUG_REG_5);
> +        regval = phy_read(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_DATA_REG);
> +        phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_DATA_REG, regval | 0x3C47);

It would also be good if you move this "0x3C47" to a #define and
include a comment about what it means.

> +
>         phydev->supported = phydev->drv->features;
>
>         genphy_config_aneg(phydev);
> --
> 2.11.0
>
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