[U-Boot] [PATCH v3 7/8] armv7: Add workaround for USB erratum A-008997
Suresh Gupta
suresh.gupta at nxp.com
Fri Feb 3 14:09:37 UTC 2017
From: Suresh Gupta <suresh.gupta at freescale.com>
Low Frequency Periodic Signaling (LFPS) Peak-to-Peak Differential
Output Voltage Test Compliance fails using default transmitter settings
Change settings required for transmitter signal swings to pass
compliance tests.
Signed-off-by: Sriram Dash <sriram.dash at nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat at nxp.com>
Signed-off-by: Suresh Gupta <suresh.gupta at nxp.com>
---
Changes in v2:
Clean up the code after Scott comments,
Previously in v1, we was defining the pointer as u32,
then casting it to u8, and then passing it to
a 16-bit accessor.
Changes in v3: None
arch/arm/cpu/armv7/ls102xa/Kconfig | 4 ++++
arch/arm/cpu/armv7/ls102xa/soc.c | 16 ++++++++++++++++
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 9 +++++++++
3 files changed, 29 insertions(+)
diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig
index 7e12565..cbd4ab6 100644
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -7,6 +7,7 @@ config ARCH_LS1021A
select SYS_FSL_ERRATUM_A010315
select SYS_FSL_ERRATUM_A009008
select SYS_FSL_ERRATUM_A009798
+ select SYS_FSL_ERRATUM_A008997
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
select SYS_FSL_DDR_BE if SYS_FSL_DDR
@@ -58,6 +59,9 @@ config SYS_FSL_ERRATUM_A009008
config SYS_FSL_ERRATUM_A009798
bool "Workaround for USB PHY erratum A009798"
+config SYS_FSL_ERRATUM_A008997
+ bool "Workaround for USB PHY erratum A008997"
+
config SYS_FSL_SRDS_1
bool
diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c
index 7ae5b29..3d6cc5f 100644
--- a/arch/arm/cpu/armv7/ls102xa/soc.c
+++ b/arch/arm/cpu/armv7/ls102xa/soc.c
@@ -79,6 +79,21 @@ static void erratum_a009798(void)
#endif /* CONFIG_SYS_FSL_ERRATUM_A009798 */
}
+static void erratum_a008997(void)
+{
+#ifdef CONFIG_SYS_FSL_ERRATUM_A008997
+ void __iomem *usb_phy = (void __iomem *)USB_PHY_BASE;
+ writew(USB_PHY_TX_OVRD_DRV_LO_VAL,
+ usb_phy + USB_PHY_TX_OVRD_DRV_LO);
+ writew(USB_PHY_MPLL_OVRD_IN_HI_VAL,
+ usb_phy + USB_PHY_MPLL_OVRD_IN_HI);
+ writew(USB_PHY_LEVEL_OVRD_IN_VAL,
+ usb_phy + USB_PHY_LEVEL_OVRD_IN);
+ writew(USB_PHY_TX_OVRD_IN_HI_VAL,
+ usb_phy + USB_PHY_TX_OVRD_IN_HI);
+#endif /* CONFIG_SYS_FSL_ERRATUM_A008997 */
+}
+
void s_init(void)
{
}
@@ -168,6 +183,7 @@ int arch_soc_init(void)
/* Erratum */
erratum_a009008();
erratum_a009798();
+ erratum_a008997();
return 0;
}
diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
index 8cafa07..c0e4372 100644
--- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
+++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
@@ -177,6 +177,15 @@ struct ccsr_gur {
#define SCFG_USB3PRM1CR 0x070
#define USB_TXVREFTUNE 0x9
#define USB_SQRXTUNE 0xFC7FFFFF
+#define USB_PHY_BASE 0x08510000
+#define USB_PHY_TX_OVRD_DRV_LO 0x2004
+#define USB_PHY_MPLL_OVRD_IN_HI 0x0024
+#define USB_PHY_LEVEL_OVRD_IN 0x002a
+#define USB_PHY_TX_OVRD_IN_HI 0x2002
+#define USB_PHY_TX_OVRD_DRV_LO_VAL 0x784C
+#define USB_PHY_MPLL_OVRD_IN_HI_VAL 0x0080
+#define USB_PHY_LEVEL_OVRD_IN_VAL 0xA9A5
+#define USB_PHY_TX_OVRD_IN_HI_VAL 0x0003
/* Supplemental Configuration Unit */
struct ccsr_scfg {
--
1.9.3
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