[U-Boot] [PATCH 1/1] aspeed: ast2500: Fix H-PLL and M-PLL clock rate calculation

[Simon Glass]

On 30 January 2017 at 12:35, Maxim Sloyko <maxims at google.com> wrote:
>
> Fix H-PLL and M-PLL rate calculation in ast2500 clock driver.
> Without this fix, valid setting can lead to division by zero
> when requesting the rate of H-PLL or M-PLL clocks.
>
> Signed-off-by: Maxim Sloyko <maxims at google.com>

Reviewed-by: Simon Glass <sjg at chromium.org>