[U-Boot] [PATCH] armv8/ls104xa: remove the DDR interactive debugging info from SPL

Zhiqiang Hou Zhiqiang.Hou at nxp.com
Mon Feb 6 03:29:00 UTC 2017


From: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>

Remove the DDR interactive debugging to reduce the size of spl image.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>
---
 include/configs/ls1043aqds.h | 2 ++
 include/configs/ls1043ardb.h | 2 ++
 include/configs/ls1046aqds.h | 2 ++
 include/configs/ls1046ardb.h | 2 ++
 4 files changed, 8 insertions(+)

diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h
index 431c8f8..33439bd 100644
--- a/include/configs/ls1043aqds.h
+++ b/include/configs/ls1043aqds.h
@@ -38,7 +38,9 @@ unsigned long get_board_ddr_clk(void);
 #define SPD_EEPROM_ADDRESS		0x51
 #define CONFIG_SYS_SPD_BUS_NUM		0
 
+#ifndef CONFIG_SPL
 #define CONFIG_FSL_DDR_INTERACTIVE	/* Interactive debugging */
+#endif
 
 #define CONFIG_DDR_ECC
 #ifdef CONFIG_DDR_ECC
diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h
index 0054d16..6a904c4 100644
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -29,7 +29,9 @@
 #define CONFIG_SYS_SPD_BUS_NUM		0
 
 #define CONFIG_FSL_DDR_BIST
+#ifndef CONFIG_SPL
 #define CONFIG_FSL_DDR_INTERACTIVE	/* Interactive debugging */
+#endif
 #define CONFIG_SYS_DDR_RAW_TIMING
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h
index 3618a06..f3877a9 100644
--- a/include/configs/ls1046aqds.h
+++ b/include/configs/ls1046aqds.h
@@ -38,7 +38,9 @@ unsigned long get_board_ddr_clk(void);
 #define SPD_EEPROM_ADDRESS		0x51
 #define CONFIG_SYS_SPD_BUS_NUM		0
 
+#ifndef CONFIG_SPL
 #define CONFIG_FSL_DDR_INTERACTIVE	/* Interactive debugging */
+#endif
 
 #define CONFIG_DDR_ECC
 #ifdef CONFIG_DDR_ECC
diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h
index 24843dc..5845ead 100644
--- a/include/configs/ls1046ardb.h
+++ b/include/configs/ls1046ardb.h
@@ -34,7 +34,9 @@
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
 #define CONFIG_FSL_DDR_BIST	/* enable built-in memory test */
+#ifndef CONFIG_SPL
 #define CONFIG_FSL_DDR_INTERACTIVE	/* Interactive debugging */
+#endif
 
 #ifdef CONFIG_RAMBOOT_PBL
 #define CONFIG_SYS_FSL_PBL_PBI board/freescale/ls1046ardb/ls1046ardb_pbi.cfg
-- 
2.1.0.27.g96db324



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