[U-Boot] [PATCH v2] arm: socfpga: fix issue with warm reset when CSEL is 0

[Marek Vasut]

On 02/15/2017 07:56 AM, Chin Liang See wrote:
> On Sel, 2017-02-14 at 10:28 -0800, Dalon Westergreen wrote:
>> When CSEL=0x0 the socfpga bootrom does not touch the clock
>> configuration for the device.  This can lead to a boot failure
>> on warm resets.  To address this, the bootrom is configured to
>> run a bit of code in the last 4KB of onchip ram on a warm reset.
>> This code puts the PLLs in bypass, disables the bootrom configuration
>> to run the code snippet, and issues a warm reset to run the bootrom.
>>
>> Signed-off-by: Dalon Westergreen <dwesterg at gmail.com>
>>
>> --
>> Changes in V2:
>>  - Fix checkpatch issues predominently due to whitespace issues
>> ---
>>  arch/arm/mach-socfpga/Makefile                     |  2 +-
>>  arch/arm/mach-socfpga/include/mach/clock_manager.h | 26 +++++++-
>>  arch/arm/mach-socfpga/include/mach/reset_manager.h |  4 ++
>>  .../arm/mach-socfpga/include/mach/system_manager.h |  7 ++-
>>  arch/arm/mach-socfpga/misc.c                       | 27 ++++++++
>>  arch/arm/mach-socfpga/reset_clock_manager.S        | 71
>> ++++++++++++++++++++++
>>  6 files changed, 134 insertions(+), 3 deletions(-)
>>  create mode 100644 arch/arm/mach-socfpga/reset_clock_manager.S
>>
>>
> 
> Acked-by: Chin Liang See <chin.liang.see at intel.com>

Sorry, in this state, definitelly

Naked-by: Marek Vasut <marex at denx.de>

-- 
Best regards,
Marek Vasut