[U-Boot] [PATCH v4 06/28] arm: socfpga: arria10: add socfpga_arria10_socdk config

Ley Foon Tan lftan.linux at gmail.com
Fri Feb 17 10:18:34 UTC 2017


On Mon, Jan 23, 2017 at 11:46 AM, Marek Vasut <marex at denx.de> wrote:
> On 01/10/2017 06:20 AM, Chee Tien Fong wrote:
>> From: Tien Fong Chee <tien.fong.chee at intel.com>
>>
>> Add config for the Arria10 SoC Development Kit.
>>
>> Signed-off-by: Dinh Nguyen <dinguyen at opensource.altera.com>
>> Signed-off-by: Tien Fong Chee <tien.fong.chee at intel.com>
>> Acked-by: Marek Vasut <marex at denx.de>
>> Cc: Marek Vasut <marex at denx.de>
>> Cc: Dinh Nguyen <dinguyen at kernel.org>
>> Cc: Chin Liang See <chin.liang.see at intel.com>
>> Cc: Tien Fong <skywindctf at gmail.com>
>> ---
>>  include/configs/socfpga_arria10_socdk.h | 94 +++++++++++++++++++++++++++++++++
>>  1 file changed, 94 insertions(+)
>>  create mode 100644 include/configs/socfpga_arria10_socdk.h
>>
>> diff --git a/include/configs/socfpga_arria10_socdk.h b/include/configs/socfpga_arria10_socdk.h
>> new file mode 100644
>> index 0000000..577f60f
>> --- /dev/null
>> +++ b/include/configs/socfpga_arria10_socdk.h
>> @@ -0,0 +1,94 @@
>> +/*
>> + *  Copyright (C) 2015 Altera Corporation <www.altera.com>
>
> 2017 ... fix globally.
Okay
>
>> + * SPDX-License-Identifier:  GPL-2.0
>> + */
>> +
>> +#ifndef __CONFIG_SOCFGPA_ARRIA10_H__
>> +#define __CONFIG_SOCFGPA_ARRIA10_H__
>> +
>> +#include <asm/arch/base_addr_a10.h>
>> +/* U-Boot Commands */
>> +#define CONFIG_SYS_NO_FLASH
>> +#define CONFIG_DOS_PARTITION
>> +#define CONFIG_FAT_WRITE
>> +#define CONFIG_HW_WATCHDOG
>> +
>> +#define CONFIG_CMD_ASKENV
>> +#define CONFIG_CMD_BOOTZ
>> +#define CONFIG_CMD_CACHE
>> +#define CONFIG_CMD_DHCP
>> +#define CONFIG_CMD_EXT4
>> +#define CONFIG_CMD_EXT4_WRITE
>> +#define CONFIG_CMD_FAT
>> +#define CONFIG_CMD_FS_GENERIC
>> +#define CONFIG_CMD_GREPENV
>> +#define CONFIG_CMD_MMC
>> +#define CONFIG_CMD_PING
>
> A lot of this stuff was converted to Kconfig, please recheck.
Okay, will update this.
>
>> +/*
>> + * Memory configurations
>> + */
>> +#define PHYS_SDRAM_1_SIZE            0x2000000
>> +
>> +/* Booting Linux */
>> +#define CONFIG_BOOTDELAY     3
>> +#define CONFIG_BOOTFILE              "zImage"
>> +#define CONFIG_BOOTARGS              "console=ttyS0," __stringify(CONFIG_BAUDRATE)
>> +#define CONFIG_BOOTCOMMAND      "run mmcload; run mmcboot"
>> +#define CONFIG_LOADADDR              0x01000000
>> +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
>> +
>> +/*
>> + * Display CPU and Board Info
>> + */
>> +#define CONFIG_DISPLAY_CPUINFO
>> +#define CONFIG_DISPLAY_BOARDINFO
>> +#define CONFIG_DISPLAY_BOARDINFO_LATE
>> +
>> +/* Ethernet on SoC (EMAC) */
>> +#if defined(CONFIG_CMD_NET)
>> +
>> +/* PHY */
>> +#define CONFIG_PHY_MICREL
>> +#define CONFIG_PHY_MICREL_KSZ9031
>> +
>> +#endif
>> +
>> +#define CONFIG_ENV_IS_IN_MMC
>> +#define CONFIG_SYS_MMC_ENV_DEV               0/* device 0 */
>> +#define CONFIG_ENV_OFFSET            512/* just after the MBR */
>> +
>> +/*
>> + * arguments passed to the bootz command. The value of
>> + * CONFIG_BOOTARGS goes into the environment value "bootargs".
>> + * Do note the value will overide also the chosen node in FDT blob.
>> + */
>> +#define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
>> +
>> +#define CONFIG_EXTRA_ENV_SETTINGS \
>> +     "verify=n\0" \
>> +     "loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
>> +     "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
>> +             "bootm ${loadaddr} - ${fdt_addr}\0" \
>> +     "bootimage=zImage\0" \
>> +     "fdt_addr=100\0" \
>> +     "fdtimage=socfpga.dtb\0" \
>> +             "fsloadcmd=ext2load\0" \
>> +     "bootm ${loadaddr} - ${fdt_addr}\0" \
>> +     "mmcroot=/dev/mmcblk0p2\0" \
>> +     "mmcboot=setenv bootargs " CONFIG_BOOTARGS \
>> +             " root=${mmcroot} rw rootwait;" \
>> +             "bootz ${loadaddr} - ${fdt_addr}\0" \
>> +     "mmcload=mmc rescan;" \
>> +             "load mmc 0:1 ${loadaddr} ${bootimage};" \
>> +             "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
>> +     "qspiroot=/dev/mtdblock0\0" \
>> +     "qspirootfstype=jffs2\0" \
>> +     "qspiboot=setenv bootargs " CONFIG_BOOTARGS \
>> +             " root=${qspiroot} rw rootfstype=${qspirootfstype};"\
>> +             "bootm ${loadaddr} - ${fdt_addr}\0"
>
> Take a look at:
> [PATCH v2 0/7] arm: socfpga: update socfpga environments
> and adjust accordingly.
I checked this patch series, it is in v8 and it hasn't integrate to
mainline yet.
I will working my patches on top of this patch series, is it okay?

Regards
Ley Foon


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