[U-Boot] [PATCH v1] serial: ns16550: Add fractional divider for Intel MID

[Andy Shevchenko]

The change introduces three integer Kconfig options
	SERIAL_DIV_M	multiplier
	SERIAL_DIV_N	divisor
	SERIAL_DIV_PS	prescaler divisor
to set default configuration of prescaler.

The UART clock is calculated as

	UART clock = XTAL * SERIAL_DIV_M / SERIAL_DIV_N

The baudrate is calculated as

	baud rate = UART clock / SERIAL_DIV_PS

In the future the options can be used on any UART where fractional
divider is implemented.

In particular, Intel MID platforms have additional registers in UART to
configure a fractional divider.

Initialize fractional divider correctly for Intel Edison platform.

For backward compatibility we have to set initial DLAB value to 16
and speed to 115200 baud, where initial frequency is 29491200Hz, and
XTAL frequency is 38.4MHz.

Signed-off-by: Andy Shevchenko <andriy.shevchenko at linux.intel.com>
---
 drivers/serial/Kconfig   | 12 ++++++++++++
 drivers/serial/ns16550.c | 21 +++++++++++++++++++++
 2 files changed, 33 insertions(+)

diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index b11f3ff89e..7860009a4b 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -268,6 +268,18 @@ config DEBUG_UART_SKIP_INIT
 	  Select this if the UART you want to use for debug output is already
 	  initialized by the time U-Boot starts its execution.
 
+config SERIAL_DIV_M
+	int
+	default 96
+
+config SERIAL_DIV_N
+	int
+	default 125
+
+config SERIAL_DIV_PS
+	int
+	default 16
+
 config ALTERA_JTAG_UART
 	bool "Altera JTAG UART support"
 	depends on DM_SERIAL
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 1f819d487b..34e39a2873 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -48,6 +48,22 @@ DECLARE_GLOBAL_DATA_PTR;
 #endif
 #endif
 
+#if defined(CONFIG_INTEL_MID)
+#define UART_MUL		0x34
+#define UART_DIV		0x38
+
+static void ns16550_writel(NS16550_t port, int offset, int value)
+{
+	struct ns16550_platdata *plat = port->plat;
+	unsigned char *addr;
+
+	offset *= 1 << plat->reg_shift;
+	addr = (unsigned char *)plat->base + offset;
+
+	writel(value, addr + plat->reg_offset);
+}
+#endif
+
 #ifndef CONFIG_SYS_NS16550_IER
 #define CONFIG_SYS_NS16550_IER  0x00
 #endif /* CONFIG_SYS_NS16550_IER */
@@ -181,6 +197,11 @@ void NS16550_init(NS16550_t com_port, int baud_divisor)
 #endif
 	serial_out(UART_MCRVAL, &com_port->mcr);
 	serial_out(ns16550_getfcr(com_port), &com_port->fcr);
+#if defined(CONFIG_INTEL_MID)
+	ns16550_writel(com_port, UART_MUL, CONFIG_SERIAL_DIV_M);
+	ns16550_writel(com_port, UART_DIV, CONFIG_SERIAL_DIV_N);
+	NS16550_setbrg(com_port, CONFIG_SERIAL_DIV_PS);
+#endif
 	if (baud_divisor != -1)
 		NS16550_setbrg(com_port, baud_divisor);
 #if defined(CONFIG_OMAP) || \
-- 
2.11.0