[U-Boot] [PATCH 1/2] clk: at91: enhance the peripheral clock

[Wenyou Yang]

Enhance the peripheral clock to support both at9sam9x5's
and at91rm9200's peripheral clock via the different compatibles.

Signed-off-by: Wenyou Yang <wenyou.yang at atmel.com>
---

 drivers/clk/at91/clk-peripheral.c | 19 ++++++++++++++++---
 1 file changed, 16 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/at91/clk-peripheral.c b/drivers/clk/at91/clk-peripheral.c
index e1ed447133..8a4c88566b 100644
--- a/drivers/clk/at91/clk-peripheral.c
+++ b/drivers/clk/at91/clk-peripheral.c
@@ -28,7 +28,8 @@ static int sam9x5_periph_clk_bind(struct udevice *dev)
 }
 
 static const struct udevice_id sam9x5_periph_clk_match[] = {
-	{ .compatible = "atmel,at91sam9x5-clk-peripheral" },
+	{ .compatible = "atmel,at91rm9200-clk-peripheral", .data = 0 },
+	{ .compatible = "atmel,at91sam9x5-clk-peripheral", .data = 1 },
 	{}
 };
 
@@ -45,12 +46,24 @@ static int periph_clk_enable(struct clk *clk)
 {
 	struct pmc_platdata *plat = dev_get_platdata(clk->dev);
 	struct at91_pmc *pmc = plat->reg_base;
+	struct udevice *parent;
+	void *addr;
 
 	if (clk->id < PERIPHERAL_ID_MIN)
 		return -1;
 
-	writel(clk->id & AT91_PMC_PCR_PID_MASK, &pmc->pcr);
-	setbits_le32(&pmc->pcr, AT91_PMC_PCR_CMD_WRITE | AT91_PMC_PCR_EN);
+	parent = dev_get_parent(clk->dev);
+	if (dev_get_driver_data(parent)) {
+		writel(clk->id & AT91_PMC_PCR_PID_MASK, &pmc->pcr);
+		setbits_le32(&pmc->pcr,
+			     AT91_PMC_PCR_CMD_WRITE | AT91_PMC_PCR_EN);
+	} else {
+		addr = &pmc->pcer;
+		if (clk->id > PERIPHERAL_ID_MAX)
+			addr = &pmc->pcer1;
+
+		setbits_le32(addr, PERIPHERAL_MASK(clk->id));
+	}
 
 	return 0;
 }
-- 
2.11.0