[U-Boot] [PATCH 1/3] ARM: dts: at91: add dts files for at91sam9m10g45ek

Wenyou Yang wenyou.yang at atmel.com
Fri Feb 24 03:12:29 UTC 2017


The device tree source files of at91sam9m10g45ek boards are copied
from the Linux v4.10, do the changes as below.
 - Add the reg property for the pinctrl node.
 - Move the gpio (pioA, pioB, pioC, pioD, pioE) nodes as the pinctrl's
   slibling nodes, instead of the child nodes.
 - Fix the compilation warnings.

Signed-off-by: Wenyou Yang <wenyou.yang at atmel.com>
---

 arch/arm/dts/Makefile             |   2 +
 arch/arm/dts/at91sam9g45.dtsi     | 212 +++++++++++-----------
 arch/arm/dts/at91sam9m10g45ek.dts | 357 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 466 insertions(+), 105 deletions(-)
 create mode 100644 arch/arm/dts/at91sam9m10g45ek.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 76dc6562ed..0403a389a9 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -330,6 +330,8 @@ dtb-$(CONFIG_TARGET_AT91SAM9260EK) += \
 	at91sam9g20ek.dtb	\
 	at91sam9g20ek_2mmc.dtb
 
+dtb-$(CONFIG_TARGET_AT91SAM9M10G45EK) += at91sam9m10g45ek.dtb
+
 dtb-$(CONFIG_TARGET_AT91SAM9X5EK) += \
 	at91sam9g15ek.dtb	\
 	at91sam9g25ek.dtb	\
diff --git a/arch/arm/dts/at91sam9g45.dtsi b/arch/arm/dts/at91sam9g45.dtsi
index af8b708ac3..f203886ec1 100644
--- a/arch/arm/dts/at91sam9g45.dtsi
+++ b/arch/arm/dts/at91sam9g45.dtsi
@@ -135,7 +135,7 @@
 					clocks = <&main_osc>;
 				};
 
-				plla: pllack {
+				plla: pllack at 0 {
 					compatible = "atmel,at91rm9200-clk-pll";
 					#clock-cells = <0>;
 					interrupts-extended = <&pmc AT91_PMC_LOCKA>;
@@ -188,13 +188,13 @@
 					interrupt-parent = <&pmc>;
 					clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
 
-					prog0: prog0 {
+					prog0: prog at 0 {
 						#clock-cells = <0>;
 						reg = <0>;
 						interrupts = <AT91_PMC_PCKRDY(0)>;
 					};
 
-					prog1: prog1 {
+					prog1: prog at 1 {
 						#clock-cells = <0>;
 						reg = <1>;
 						interrupts = <AT91_PMC_PCKRDY(1)>;
@@ -206,25 +206,25 @@
 					#address-cells = <1>;
 					#size-cells = <0>;
 
-					ddrck: ddrck {
+					ddrck: ddrck at 2 {
 						#clock-cells = <0>;
 						reg = <2>;
 						clocks = <&mck>;
 					};
 
-					uhpck: uhpck {
+					uhpck: uhpck at 6 {
 						#clock-cells = <0>;
 						reg = <6>;
 						clocks = <&usb>;
 					};
 
-					pck0: pck0 {
+					pck0: pck0 at 8 {
 						#clock-cells = <0>;
 						reg = <8>;
 						clocks = <&prog0>;
 					};
 
-					pck1: pck1 {
+					pck1: pck1 at 9 {
 						#clock-cells = <0>;
 						reg = <9>;
 						clocks = <&prog1>;
@@ -237,147 +237,147 @@
 					#size-cells = <0>;
 					clocks = <&mck>;
 
-					pioA_clk: pioA_clk {
+					pioA_clk: pioA_clk at 2 {
 						#clock-cells = <0>;
 						reg = <2>;
 					};
 
-					pioB_clk: pioB_clk {
+					pioB_clk: pioB_clk at 3 {
 						#clock-cells = <0>;
 						reg = <3>;
 					};
 
-					pioC_clk: pioC_clk {
+					pioC_clk: pioC_clk at 4 {
 						#clock-cells = <0>;
 						reg = <4>;
 					};
 
-					pioDE_clk: pioDE_clk {
+					pioDE_clk: pioDE_clk at 5 {
 						#clock-cells = <0>;
 						reg = <5>;
 					};
 
-					trng_clk: trng_clk {
+					trng_clk: trng_clk at 6 {
 						#clock-cells = <0>;
 						reg = <6>;
 					};
 
-					usart0_clk: usart0_clk {
+					usart0_clk: usart0_clk at 7 {
 						#clock-cells = <0>;
 						reg = <7>;
 					};
 
-					usart1_clk: usart1_clk {
+					usart1_clk: usart1_clk at 8 {
 						#clock-cells = <0>;
 						reg = <8>;
 					};
 
-					usart2_clk: usart2_clk {
+					usart2_clk: usart2_clk at 9 {
 						#clock-cells = <0>;
 						reg = <9>;
 					};
 
-					usart3_clk: usart3_clk {
+					usart3_clk: usart3_clk at 10 {
 						#clock-cells = <0>;
 						reg = <10>;
 					};
 
-					mci0_clk: mci0_clk {
+					mci0_clk: mci0_clk at 11 {
 						#clock-cells = <0>;
 						reg = <11>;
 					};
 
-					twi0_clk: twi0_clk {
+					twi0_clk: twi0_clk at 12 {
 						#clock-cells = <0>;
 						reg = <12>;
 					};
 
-					twi1_clk: twi1_clk {
+					twi1_clk: twi1_clk at 13 {
 						#clock-cells = <0>;
 						reg = <13>;
 					};
 
-					spi0_clk: spi0_clk {
+					spi0_clk: spi0_clk at 14 {
 						#clock-cells = <0>;
 						reg = <14>;
 					};
 
-					spi1_clk: spi1_clk {
+					spi1_clk: spi1_clk at 15 {
 						#clock-cells = <0>;
 						reg = <15>;
 					};
 
-					ssc0_clk: ssc0_clk {
+					ssc0_clk: ssc0_clk at 16 {
 						#clock-cells = <0>;
 						reg = <16>;
 					};
 
-					ssc1_clk: ssc1_clk {
+					ssc1_clk: ssc1_clk at 17 {
 						#clock-cells = <0>;
 						reg = <17>;
 					};
 
-					tcb0_clk: tcb0_clk {
+					tcb0_clk: tcb0_clk at 18 {
 						#clock-cells = <0>;
 						reg = <18>;
 					};
 
-					pwm_clk: pwm_clk {
+					pwm_clk: pwm_clk at 19 {
 						#clock-cells = <0>;
 						reg = <19>;
 					};
 
-					adc_clk: adc_clk {
+					adc_clk: adc_clk at 20 {
 						#clock-cells = <0>;
 						reg = <20>;
 					};
 
-					dma0_clk: dma0_clk {
+					dma0_clk: dma0_clk at 21 {
 						#clock-cells = <0>;
 						reg = <21>;
 					};
 
-					uhphs_clk: uhphs_clk {
+					uhphs_clk: uhphs_clk at 22 {
 						#clock-cells = <0>;
 						reg = <22>;
 					};
 
-					lcd_clk: lcd_clk {
+					lcd_clk: lcd_clk at 23 {
 						#clock-cells = <0>;
 						reg = <23>;
 					};
 
-					ac97_clk: ac97_clk {
+					ac97_clk: ac97_clk at 24 {
 						#clock-cells = <0>;
 						reg = <24>;
 					};
 
-					macb0_clk: macb0_clk {
+					macb0_clk: macb0_clk at 25 {
 						#clock-cells = <0>;
 						reg = <25>;
 					};
 
-					isi_clk: isi_clk {
+					isi_clk: isi_clk at 26 {
 						#clock-cells = <0>;
 						reg = <26>;
 					};
 
-					udphs_clk: udphs_clk {
+					udphs_clk: udphs_clk at 27 {
 						#clock-cells = <0>;
 						reg = <27>;
 					};
 
-					aestdessha_clk: aestdessha_clk {
+					aestdessha_clk: aestdessha_clk at 28 {
 						#clock-cells = <0>;
 						reg = <28>;
 					};
 
-					mci1_clk: mci1_clk {
+					mci1_clk: mci1_clk at 29 {
 						#clock-cells = <0>;
 						reg = <29>;
 					};
 
-					vdec_clk: vdec_clk {
+					vdec_clk: vdec_clk at 30 {
 						#clock-cells = <0>;
 						reg = <30>;
 					};
@@ -434,6 +434,12 @@
 				#size-cells = <1>;
 				compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
 				ranges = <0xfffff200 0xfffff200 0xa00>;
+				reg = <0xfffff200 0x200
+				       0xfffff400 0x200
+				       0xfffff600 0x200
+				       0xfffff800 0x200
+				       0xfffffa00 0x200
+				      >;
 
 				atmel,mux-mask = <
 				      /*    A         B     */
@@ -478,8 +484,8 @@
 				dbgu {
 					pinctrl_dbgu: dbgu-0 {
 						atmel,pins =
-							<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB12 periph A */
-							 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB13 periph A */
+							<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
+							 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 					};
 				};
 
@@ -845,61 +851,61 @@
 							 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PE30 periph A */
 					};
 				};
+			};
 
-				pioA: gpio at fffff200 {
-					compatible = "atmel,at91rm9200-gpio";
-					reg = <0xfffff200 0x200>;
-					interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
-					#gpio-cells = <2>;
-					gpio-controller;
-					interrupt-controller;
-					#interrupt-cells = <2>;
-					clocks = <&pioA_clk>;
-				};
+			pioA: gpio at fffff200 {
+				compatible = "atmel,at91rm9200-gpio";
+				reg = <0xfffff200 0x200>;
+				interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
+				#gpio-cells = <2>;
+				gpio-controller;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				clocks = <&pioA_clk>;
+			};
 
-				pioB: gpio at fffff400 {
-					compatible = "atmel,at91rm9200-gpio";
-					reg = <0xfffff400 0x200>;
-					interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
-					#gpio-cells = <2>;
-					gpio-controller;
-					interrupt-controller;
-					#interrupt-cells = <2>;
-					clocks = <&pioB_clk>;
-				};
+			pioB: gpio at fffff400 {
+				compatible = "atmel,at91rm9200-gpio";
+				reg = <0xfffff400 0x200>;
+				interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
+				#gpio-cells = <2>;
+				gpio-controller;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				clocks = <&pioB_clk>;
+			};
 
-				pioC: gpio at fffff600 {
-					compatible = "atmel,at91rm9200-gpio";
-					reg = <0xfffff600 0x200>;
-					interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
-					#gpio-cells = <2>;
-					gpio-controller;
-					interrupt-controller;
-					#interrupt-cells = <2>;
-					clocks = <&pioC_clk>;
-				};
+			pioC: gpio at fffff600 {
+				compatible = "atmel,at91rm9200-gpio";
+				reg = <0xfffff600 0x200>;
+				interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
+				#gpio-cells = <2>;
+				gpio-controller;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				clocks = <&pioC_clk>;
+			};
 
-				pioD: gpio at fffff800 {
-					compatible = "atmel,at91rm9200-gpio";
-					reg = <0xfffff800 0x200>;
-					interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
-					#gpio-cells = <2>;
-					gpio-controller;
-					interrupt-controller;
-					#interrupt-cells = <2>;
-					clocks = <&pioDE_clk>;
-				};
+			pioD: gpio at fffff800 {
+				compatible = "atmel,at91rm9200-gpio";
+				reg = <0xfffff800 0x200>;
+				interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
+				#gpio-cells = <2>;
+				gpio-controller;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				clocks = <&pioDE_clk>;
+			};
 
-				pioE: gpio at fffffa00 {
-					compatible = "atmel,at91rm9200-gpio";
-					reg = <0xfffffa00 0x200>;
-					interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
-					#gpio-cells = <2>;
-					gpio-controller;
-					interrupt-controller;
-					#interrupt-cells = <2>;
-					clocks = <&pioDE_clk>;
-				};
+			pioE: gpio at fffffa00 {
+				compatible = "atmel,at91rm9200-gpio";
+				reg = <0xfffffa00 0x200>;
+				interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
+				#gpio-cells = <2>;
+				gpio-controller;
+				interrupt-controller;
+				#interrupt-cells = <2>;
+				clocks = <&pioDE_clk>;
 			};
 
 			dbgu: serial at ffffee00 {
@@ -978,7 +984,7 @@
 
 			trng at fffcc000 {
 				compatible = "atmel,at91sam9g45-trng";
-				reg = <0xfffcc000 0x4000>;
+				reg = <0xfffcc000 0x100>;
 				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 0>;
 				clocks = <&trng_clk>;
 			};
@@ -1044,28 +1050,24 @@
 				atmel,adc-res-names = "lowres", "highres";
 				atmel,adc-use-res = "highres";
 
-				trigger at 0 {
-					reg = <0>;
+				trigger0 {
 					trigger-name = "external-rising";
 					trigger-value = <0x1>;
 					trigger-external;
 				};
-				trigger at 1 {
-					reg = <1>;
+				trigger1 {
 					trigger-name = "external-falling";
 					trigger-value = <0x2>;
 					trigger-external;
 				};
 
-				trigger at 2 {
-					reg = <2>;
+				trigger2 {
 					trigger-name = "external-any";
 					trigger-value = <0x3>;
 					trigger-external;
 				};
 
-				trigger at 3 {
-					reg = <3>;
+				trigger3 {
 					trigger-name = "continuous";
 					trigger-value = <0x6>;
 				};
@@ -1169,13 +1171,13 @@
 				clock-names = "pclk", "hclk";
 				status = "disabled";
 
-				ep0 {
+				ep at 0 {
 					reg = <0>;
 					atmel,fifo-size = <64>;
 					atmel,nb-banks = <1>;
 				};
 
-				ep1 {
+				ep at 1 {
 					reg = <1>;
 					atmel,fifo-size = <1024>;
 					atmel,nb-banks = <2>;
@@ -1183,7 +1185,7 @@
 					atmel,can-isoc;
 				};
 
-				ep2 {
+				ep at 2 {
 					reg = <2>;
 					atmel,fifo-size = <1024>;
 					atmel,nb-banks = <2>;
@@ -1191,21 +1193,21 @@
 					atmel,can-isoc;
 				};
 
-				ep3 {
+				ep at 3 {
 					reg = <3>;
 					atmel,fifo-size = <1024>;
 					atmel,nb-banks = <3>;
 					atmel,can-dma;
 				};
 
-				ep4 {
+				ep at 4 {
 					reg = <4>;
 					atmel,fifo-size = <1024>;
 					atmel,nb-banks = <3>;
 					atmel,can-dma;
 				};
 
-				ep5 {
+				ep at 5 {
 					reg = <5>;
 					atmel,fifo-size = <1024>;
 					atmel,nb-banks = <3>;
@@ -1213,7 +1215,7 @@
 					atmel,can-isoc;
 				};
 
-				ep6 {
+				ep at 6 {
 					reg = <6>;
 					atmel,fifo-size = <1024>;
 					atmel,nb-banks = <3>;
@@ -1320,7 +1322,7 @@
 		};
 	};
 
-	i2c at 0 {
+	i2c-gpio-0 {
 		compatible = "i2c-gpio";
 		gpios = <&pioA 20 GPIO_ACTIVE_HIGH /* sda */
 			 &pioA 21 GPIO_ACTIVE_HIGH /* scl */
diff --git a/arch/arm/dts/at91sam9m10g45ek.dts b/arch/arm/dts/at91sam9m10g45ek.dts
new file mode 100644
index 0000000000..2400c99134
--- /dev/null
+++ b/arch/arm/dts/at91sam9m10g45ek.dts
@@ -0,0 +1,357 @@
+/*
+ * at91sam9m10g45ek.dts - Device Tree file for AT91SAM9M10G45-EK board
+ *
+ *  Copyright (C) 2011 Atmel,
+ *                2011 Nicolas Ferre <nicolas.ferre at atmel.com>
+ *
+ * Licensed under GPLv2 or later.
+ */
+/dts-v1/;
+#include "at91sam9g45.dtsi"
+#include <dt-bindings/pwm/pwm.h>
+
+/ {
+	model = "Atmel AT91SAM9M10G45-EK";
+	compatible = "atmel,at91sam9m10g45ek", "atmel,at91sam9g45", "atmel,at91sam9";
+
+	chosen {
+		bootargs = "mem=64M root=/dev/mtdblock1 rw rootfstype=jffs2";
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory {
+		reg = <0x70000000 0x4000000>;
+	};
+
+	clocks {
+		slow_xtal {
+		      clock-frequency = <32768>;
+		};
+
+		main_xtal {
+		      clock-frequency = <12000000>;
+		};
+	};
+
+	ahb {
+		apb {
+			dbgu: serial at ffffee00 {
+				status = "okay";
+			};
+
+			usart1: serial at fff90000 {
+				pinctrl-0 =
+					<&pinctrl_usart1
+					 &pinctrl_usart1_rts
+					 &pinctrl_usart1_cts>;
+				status = "okay";
+			};
+
+			macb0: ethernet at fffbc000 {
+				phy-mode = "rmii";
+				status = "okay";
+			};
+
+			i2c0: i2c at fff84000 {
+				status = "okay";
+				ov2640: camera at 30 {
+					compatible = "ovti,ov2640";
+					reg = <0x30>;
+					pinctrl-names = "default";
+					pinctrl-0 = <&pinctrl_pck1_as_isi_mck &pinctrl_sensor_power &pinctrl_sensor_reset>;
+					resetb-gpios = <&pioD 12 GPIO_ACTIVE_LOW>;
+					pwdn-gpios = <&pioD 13 GPIO_ACTIVE_HIGH>;
+					clocks = <&pck1>;
+					clock-names = "xvclk";
+					assigned-clocks = <&pck1>;
+					assigned-clock-rates = <25000000>;
+
+					port {
+						ov2640_0: endpoint {
+							remote-endpoint = <&isi_0>;
+							bus-width = <8>;
+						};
+					};
+				};
+			};
+
+			i2c1: i2c at fff88000 {
+				status = "okay";
+			};
+
+			watchdog at fffffd40 {
+				status = "okay";
+			};
+
+			mmc0: mmc at fff80000 {
+				pinctrl-0 = <
+					&pinctrl_board_mmc0
+					&pinctrl_mmc0_slot0_clk_cmd_dat0
+					&pinctrl_mmc0_slot0_dat1_3>;
+				status = "okay";
+				slot at 0 {
+					reg = <0>;
+					bus-width = <4>;
+					cd-gpios = <&pioD 10 GPIO_ACTIVE_HIGH>;
+				};
+			};
+
+			mmc1: mmc at fffd0000 {
+				pinctrl-0 = <
+					&pinctrl_board_mmc1
+					&pinctrl_mmc1_slot0_clk_cmd_dat0
+					&pinctrl_mmc1_slot0_dat1_3>;
+				status = "okay";
+				slot at 0 {
+					reg = <0>;
+					bus-width = <4>;
+					cd-gpios = <&pioD 11 GPIO_ACTIVE_HIGH>;
+					wp-gpios = <&pioD 29 GPIO_ACTIVE_HIGH>;
+				};
+			};
+
+			pinctrl at fffff200 {
+				camera_sensor {
+					pinctrl_pck1_as_isi_mck: pck1_as_isi_mck-0 {
+						atmel,pins =
+							<AT91_PIOB 31 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_sensor_reset: sensor_reset-0 {
+						atmel,pins =
+							<AT91_PIOD 12 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_sensor_power: sensor_power-0 {
+						atmel,pins =
+							<AT91_PIOD 13 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
+					};
+				};
+				mmc0 {
+					pinctrl_board_mmc0: mmc0-board {
+						atmel,pins =
+							<AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;	/* PD10 gpio CD pin pull up and deglitch */
+					};
+				};
+
+				mmc1 {
+					pinctrl_board_mmc1: mmc1-board {
+						atmel,pins =
+							<AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH	/* PD11 gpio CD pin pull up and deglitch */
+							 AT91_PIOD 29 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;	/* PD29 gpio WP pin pull up */
+					};
+				};
+
+				pwm0 {
+					pinctrl_pwm_leds: pwm-led {
+						atmel,pins =
+							<AT91_PIOD 0  AT91_PERIPH_B AT91_PINCTRL_PULL_UP	/* PD0 periph B */
+							 AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;	/* PD31 periph B */
+					};
+				};
+			};
+
+			spi0: spi at fffa4000{
+				status = "okay";
+				cs-gpios = <&pioB 3 0>, <0>, <0>, <0>;
+				mtd_dataflash at 0 {
+					compatible = "atmel,at45", "atmel,dataflash";
+					spi-max-frequency = <13000000>;
+					reg = <0>;
+				};
+			};
+
+			usb2: gadget at fff78000 {
+				atmel,vbus-gpio = <&pioB 19 GPIO_ACTIVE_HIGH>;
+				status = "okay";
+			};
+
+			adc0: adc at fffb0000 {
+				pinctrl-names = "default";
+				pinctrl-0 = <
+					&pinctrl_adc0_ad0
+					&pinctrl_adc0_ad1
+					&pinctrl_adc0_ad2
+					&pinctrl_adc0_ad3
+					&pinctrl_adc0_ad4
+					&pinctrl_adc0_ad5
+					&pinctrl_adc0_ad6
+					&pinctrl_adc0_ad7>;
+				atmel,adc-ts-wires = <4>;
+				status = "okay";
+			};
+
+			isi at fffb4000 {
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_isi_data_0_7>;
+				status = "okay";
+				port {
+					isi_0: endpoint {
+						remote-endpoint = <&ov2640_0>;
+						bus-width = <8>;
+						vsync-active = <1>;
+						hsync-active = <1>;
+					};
+				};
+			};
+
+			pwm0: pwm at fffb8000 {
+				status = "okay";
+
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_pwm_leds>;
+			};
+
+			rtc at fffffd20 {
+				atmel,rtt-rtc-time-reg = <&gpbr 0x0>;
+				status = "okay";
+			};
+
+			gpbr: syscon at fffffd60 {
+				status = "okay";
+			};
+
+			rtc at fffffdb0 {
+				status = "okay";
+			};
+		};
+
+		fb0: fb at 0x00500000 {
+			display = <&display0>;
+			status = "okay";
+
+			display0: display {
+				bits-per-pixel = <32>;
+				atmel,lcdcon-backlight;
+				atmel,dmacon = <0x1>;
+				atmel,lcdcon2 = <0x80008002>;
+				atmel,guard-time = <9>;
+				atmel,lcd-wiring-mode = "RGB";
+
+				display-timings {
+					native-mode = <&timing0>;
+					timing0: timing0 {
+						clock-frequency = <9000000>;
+						hactive = <480>;
+						vactive = <272>;
+						hback-porch = <1>;
+						hfront-porch = <1>;
+						vback-porch = <40>;
+						vfront-porch = <1>;
+						hsync-len = <45>;
+						vsync-len = <1>;
+					};
+				};
+			};
+		};
+
+		nand0: nand at 40000000 {
+			nand-bus-width = <8>;
+			nand-ecc-mode = "soft";
+			nand-on-flash-bbt;
+			status = "okay";
+
+			boot at 0 {
+				label = "bootstrap/uboot/kernel";
+				reg = <0x0 0x400000>;
+			};
+
+			rootfs at 400000 {
+				label = "rootfs";
+				reg = <0x400000 0x3C00000>;
+			};
+
+			data at 4000000 {
+				label = "data";
+				reg = <0x4000000 0xC000000>;
+			};
+		};
+
+		usb0: ohci at 00700000 {
+			status = "okay";
+			num-ports = <2>;
+			atmel,vbus-gpio = <&pioD 1 GPIO_ACTIVE_LOW
+					   &pioD 3 GPIO_ACTIVE_LOW>;
+		};
+
+		usb1: ehci at 00800000 {
+			status = "okay";
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		d8 {
+			label = "d8";
+			gpios = <&pioD 30 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "heartbeat";
+		};
+	};
+
+	pwmleds {
+		compatible = "pwm-leds";
+
+		d6 {
+			label = "d6";
+			pwms = <&pwm0 3 5000 PWM_POLARITY_INVERTED>;
+			max-brightness = <255>;
+			linux,default-trigger = "nand-disk";
+		};
+
+		d7 {
+			label = "d7";
+			pwms = <&pwm0 1 5000 PWM_POLARITY_INVERTED>;
+			max-brightness = <255>;
+			linux,default-trigger = "mmc0";
+		};
+	};
+
+	gpio_keys {
+		compatible = "gpio-keys";
+
+		left_click {
+			label = "left_click";
+			gpios = <&pioB 6 GPIO_ACTIVE_LOW>;
+			linux,code = <272>;
+			wakeup-source;
+		};
+
+		right_click {
+			label = "right_click";
+			gpios = <&pioB 7 GPIO_ACTIVE_LOW>;
+			linux,code = <273>;
+			wakeup-source;
+		};
+
+		left {
+			label = "Joystick Left";
+			gpios = <&pioB 14 GPIO_ACTIVE_LOW>;
+			linux,code = <105>;
+		};
+
+		right {
+			label = "Joystick Right";
+			gpios = <&pioB 15 GPIO_ACTIVE_LOW>;
+			linux,code = <106>;
+		};
+
+		up {
+			label = "Joystick Up";
+			gpios = <&pioB 16 GPIO_ACTIVE_LOW>;
+			linux,code = <103>;
+		};
+
+		down {
+			label = "Joystick Down";
+			gpios = <&pioB 17 GPIO_ACTIVE_LOW>;
+			linux,code = <108>;
+		};
+
+		enter {
+			label = "Joystick Press";
+			gpios = <&pioB 18 GPIO_ACTIVE_LOW>;
+			linux,code = <28>;
+		};
+	};
+};
-- 
2.11.0



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