[U-Boot] [PATCH v2] serial: Add serial driver for Intel MID
Kever Yang
kever.yang at rock-chips.com
Tue Feb 28 02:27:22 UTC 2017
Hi Andy,
On 02/28/2017 12:22 AM, Andy Shevchenko wrote:
> Add a specific serial driver for Intel MID platforms.
>
> It has special fractional divider which can be programmed via UART_PS,
> UART_MUL, and UART_DIV registers.
>
> The UART clock is calculated as
>
> UART clock = XTAL * UART_MUL / UART_DIV
>
> The baudrate is calculated as
>
> baud rate = UART clock / UART_PS / DLAB
>
> Initialize fractional divider correctly for Intel Edison platform.
>
> For backward compatibility we have to set initial DLAB value to 16
> and speed to 115200 baud, where initial frequency is 29491200Hz, and
> XTAL frequency is 38.4MHz.
>
> Signed-off-by: Andy Shevchenko <andriy.shevchenko at linux.intel.com>
> ---
> drivers/serial/Kconfig | 9 ++++++
> drivers/serial/Makefile | 1 +
> drivers/serial/serial_mid.c | 71 +++++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 81 insertions(+)
> create mode 100644 drivers/serial/serial_mid.c
>
> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
> index b11f3ff89e..1fb5a7b17d 100644
> --- a/drivers/serial/Kconfig
> +++ b/drivers/serial/Kconfig
> @@ -398,6 +398,15 @@ config MESON_SERIAL
> If you have an Amlogic Meson based board and want to use the on-chip
> serial ports, say Y to this option. If unsure, say N.
>
> +config MID_SERIAL
> + bool "Intel MID platform UART support"
MID is not a Intel Chip series, right?
So I think if you named MID_SERIAL or serial_mid.c would make people
confused,
could you add a INTEL- prefix for it or something relate to the SoC chip
itself?
Thanks,
- Kever
> + depends on DM_SERIAL && OF_CONTROL
> + select SYS_NS16550
> + help
> + Select this to enable a UART for Intel MID platforms.
> + This uses the ns16550 driver as a library which is selected by
> + default.
> +
> config MSM_SERIAL
> bool "Qualcomm on-chip UART"
> depends on DM_SERIAL
> diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
> index 8430668bf9..61535212aa 100644
> --- a/drivers/serial/Makefile
> +++ b/drivers/serial/Makefile
> @@ -28,6 +28,7 @@ obj-$(CONFIG_S5P) += serial_s5p.o
> obj-$(CONFIG_MXC_UART) += serial_mxc.o
> obj-$(CONFIG_PXA_SERIAL) += serial_pxa.o
> obj-$(CONFIG_MESON_SERIAL) += serial_meson.o
> +obj-$(CONFIG_MID_SERIAL) += serial_mid.o
> ifdef CONFIG_SPL_BUILD
> obj-$(CONFIG_ROCKCHIP_SERIAL) += serial_rockchip.o
> endif
> diff --git a/drivers/serial/serial_mid.c b/drivers/serial/serial_mid.c
> new file mode 100644
> index 0000000000..eb91ffc7d4
> --- /dev/null
> +++ b/drivers/serial/serial_mid.c
> @@ -0,0 +1,71 @@
> +/*
> + * Copyright (c) 2017 Intel Corporation
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#include <common.h>
> +#include <debug_uart.h>
> +#include <dm.h>
> +#include <dt-structs.h>
> +#include <ns16550.h>
> +#include <serial.h>
> +
> +/*
> + * The UART clock is calculated as
> + *
> + * UART clock = XTAL * UART_MUL / UART_DIV
> + *
> + * The baudrate is calculated as
> + *
> + * baud rate = UART clock / UART_PS / DLAB
> + */
> +#define UART_PS 0x30
> +#define UART_MUL 0x34
> +#define UART_DIV 0x38
> +
> +static void mid_writel(struct ns16550_platdata *plat, int offset, int value)
> +{
> + unsigned char *addr;
> +
> + offset *= 1 << plat->reg_shift;
> + addr = (unsigned char *)plat->base + offset;
> +
> + writel(value, addr + plat->reg_offset);
> +}
> +
> +static int mid_serial_probe(struct udevice *dev)
> +{
> + struct ns16550_platdata *plat = dev_get_platdata(dev);
> +
> + /*
> + * Initialize fractional divider correctly for Intel Edison
> + * platform.
> + *
> + * For backward compatibility we have to set initial DLAB value
> + * to 16 and speed to 115200 baud, where initial frequency is
> + * 29491200Hz, and XTAL frequency is 38.4MHz.
> + */
> + mid_writel(plat, UART_MUL, 96);
> + mid_writel(plat, UART_DIV, 125);
> + mid_writel(plat, UART_PS, 16);
> +
> + return ns16550_serial_probe(dev);
> +}
> +
> +static const struct udevice_id mid_serial_ids[] = {
> + { .compatible = "intel,mid-uart" },
> + {}
> +};
> +
> +U_BOOT_DRIVER(mid_uart) = {
> + .name = "mid_uart",
> + .id = UCLASS_SERIAL,
> + .of_match = mid_serial_ids,
> + .ofdata_to_platdata = ns16550_serial_ofdata_to_platdata,
> + .platdata_auto_alloc_size = sizeof(struct ns16550_platdata),
> + .priv_auto_alloc_size = sizeof(struct NS16550),
> + .probe = mid_serial_probe,
> + .ops = &ns16550_serial_ops,
> + .flags = DM_FLAG_PRE_RELOC,
> +};
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