[U-Boot] [PATCH v3 2/2] mmc: tangier: Add Intel Tangier eMMC/SDHCI driver

[Jaehoon Chung]

Hi Andy,

On 02/20/2017 08:24 PM, Andy Shevchenko wrote:
> From: Felipe Balbi <felipe.balbi at linux.intel.com>
> 
> This patch adds Intel Tangier eMMC/SDHCI driver.
> 
> Intel Tangier SoC contains a hybrid of PCI and non-PCI devices. SDHCI
> controller is one of the devices which are *not* on a PCI and, hence,
> cannot be enumerated by standard PCI means. This driver, allows for
> SDHCI controller on Tangier SoC to work in U-Boot.
> 
> Signed-off-by: Vincent Tinelli <vincent.tinelli at intel.com>
> Signed-off-by: Felipe Balbi <felipe.balbi at linux.intel.com>
> Signed-off-by: Andy Shevchenko <andriy.shevchenko at linux.intel.com>

Applied on u-boot-mmc. Thanks!

Best Regards,
Jaehoon Chung

> ---
>  drivers/mmc/Kconfig         | 14 ++++++++
>  drivers/mmc/Makefile        |  1 +
>  drivers/mmc/tangier_sdhci.c | 81 +++++++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 96 insertions(+)
>  create mode 100644 drivers/mmc/tangier_sdhci.c
> 
> diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
> index af8436f337..7238aade42 100644
> --- a/drivers/mmc/Kconfig
> +++ b/drivers/mmc/Kconfig
> @@ -318,6 +318,20 @@ config MMC_SDHCI_XENON
>  
>  	  If unsure, say N.
>  
> +config MMC_SDHCI_TANGIER
> +	bool "Tangier SDHCI controller support"
> +	depends on DM_MMC && BLK
> +	depends on MMC_SDHCI
> +	help
> +	  This selects support for SDHCI controller on Tanginer
> +	  SoC. Note that this controller does not sit on PCI bus and,
> +	  hence, cannot be enumerated by standard PCI means.
> +
> +	  If you're using an Intel Tangier SoC (available on Intel
> +	  Edison board), say Y here.
> +
> +	  If unsure, say N.
> +
>  config MMC_SDHCI_TEGRA
>  	bool "SDHCI platform support for the Tegra SD/MMC Controller"
>  	depends on TEGRA
> diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
> index 9fccac8ead..b210d2c3b3 100644
> --- a/drivers/mmc/Makefile
> +++ b/drivers/mmc/Makefile
> @@ -61,6 +61,7 @@ obj-$(CONFIG_MMC_SDHCI_PIC32)		+= pic32_sdhci.o
>  obj-$(CONFIG_MMC_SDHCI_ROCKCHIP)	+= rockchip_sdhci.o
>  obj-$(CONFIG_MMC_SDHCI_S5P)		+= s5p_sdhci.o
>  obj-$(CONFIG_MMC_SDHCI_SPEAR)		+= spear_sdhci.o
> +obj-$(CONFIG_MMC_SDHCI_TANGIER)		+= tangier_sdhci.o
>  obj-$(CONFIG_MMC_SDHCI_TEGRA)		+= tegra_mmc.o
>  obj-$(CONFIG_MMC_SDHCI_XENON)		+= xenon_sdhci.o
>  obj-$(CONFIG_MMC_SDHCI_ZYNQ)		+= zynq_sdhci.o
> diff --git a/drivers/mmc/tangier_sdhci.c b/drivers/mmc/tangier_sdhci.c
> new file mode 100644
> index 0000000000..77b18e75f0
> --- /dev/null
> +++ b/drivers/mmc/tangier_sdhci.c
> @@ -0,0 +1,81 @@
> +/*
> + * Copyright (c) 2017 Intel Corporation
> + *
> + * SPDX-License-Identifier:	GPL-2.0+
> + */
> +#include <common.h>
> +#include <dm.h>
> +#include <dm/device.h>
> +#include <linux/io.h>
> +#include <linux/sizes.h>
> +#include <malloc.h>
> +#include <mmc.h>
> +#include <sdhci.h>
> +
> +#define SDHCI_TANGIER_FMAX	200000000
> +#define SDHCI_TANGIER_FMIN	400000
> +
> +struct sdhci_tangier_plat {
> +	struct mmc_config cfg;
> +	struct mmc mmc;
> +	void __iomem *ioaddr;
> +};
> +
> +static int sdhci_tangier_bind(struct udevice *dev)
> +{
> +	struct sdhci_tangier_plat *plat = dev_get_platdata(dev);
> +
> +	return sdhci_bind(dev, &plat->mmc, &plat->cfg);
> +}
> +
> +static int sdhci_tangier_probe(struct udevice *dev)
> +{
> +	struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
> +	struct sdhci_tangier_plat *plat = dev_get_platdata(dev);
> +	struct sdhci_host *host = dev_get_priv(dev);
> +	fdt_addr_t base;
> +	int ret;
> +
> +	base = dev_get_addr(dev);
> +	if (base == FDT_ADDR_T_NONE)
> +		return -EINVAL;
> +
> +	plat->ioaddr = devm_ioremap(dev, base, SZ_1K);
> +	if (!plat->ioaddr)
> +		return -ENOMEM;
> +
> +	host->name = dev->name;
> +	host->ioaddr = plat->ioaddr;
> +	host->quirks = SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE |
> +		       SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_WAIT_SEND_CMD;
> +
> +	/* MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195 */
> +	host->voltages = MMC_VDD_165_195;
> +
> +	ret = sdhci_setup_cfg(&plat->cfg, host, SDHCI_TANGIER_FMAX,
> +			SDHCI_TANGIER_FMIN);
> +	if (ret)
> +		return ret;
> +
> +	upriv->mmc = &plat->mmc;
> +	host->mmc = &plat->mmc;
> +	host->mmc->priv = host;
> +
> +	return sdhci_probe(dev);
> +}
> +
> +static const struct udevice_id sdhci_tangier_match[] = {
> +	{ .compatible = "intel,sdhci-tangier" },
> +	{ /* sentinel */ }
> +};
> +
> +U_BOOT_DRIVER(sdhci_tangier) = {
> +	.name		= "sdhci-tangier",
> +	.id		= UCLASS_MMC,
> +	.of_match	= sdhci_tangier_match,
> +	.bind		= sdhci_tangier_bind,
> +	.probe		= sdhci_tangier_probe,
> +	.ops		= &sdhci_ops,
> +	.priv_auto_alloc_size = sizeof(struct sdhci_host),
> +	.platdata_auto_alloc_size = sizeof(struct sdhci_tangier_plat),
> +};
>